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MCQOPTIONS
This section includes 9294 Mcqs, each offering curated multiple-choice questions to sharpen your Engineering knowledge and support exam preparation. Choose a topic below to get started.
| 4701. |
The main drawbacks of EEPROM are |
| A. | low density |
| B. | high cost |
| C. | both low density and high cost |
| D. | none of the above |
| Answer» D. none of the above | |
| 4702. |
Octal 16 is equal to decimal |
| A. | 13 |
| B. | 14 |
| C. | 15 |
| D. | 16 |
| Answer» C. 15 | |
| 4703. |
The radix of a hexadecimal system is |
| A. | 2 |
| B. | 3 |
| C. | 8 |
| D. | 16 |
| Answer» E. | |
| 4704. |
A 3 bit synchronous counter uses FF with propagation delay time of 20 ns each. The maximum possible time required for change of state will be. |
| A. | 60 ns |
| B. | 40 ns |
| C. | 20 ns |
| D. | None |
| Answer» C. 20 ns | |
| 4705. |
A 10 MHz square wave clocks 5 bit ripple counter. The frequency of the 3rd FF output is |
| A. | 2 MHz |
| B. | 1.25 MHz |
| C. | 50 MHz |
| D. | 615 kHz |
| Answer» C. 50 MHz | |
| 4706. |
Computer ICs work reliably because |
| A. | they are based on two state design |
| B. | these are made from pure silicon |
| C. | these are maintained at two temperatures |
| D. | none of the above |
| Answer» B. these are made from pure silicon | |
| 4707. |
A ripple counter has propagation delay. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 4708. |
In 8085 microprocessor, which of the following interrupts has the lowest priority? |
| A. | RST 5.5 |
| B. | RST 7.5 |
| C. | TRAP |
| D. | INTR |
| Answer» B. RST 7.5 | |
| 4709. |
The total number of fundamental products of three variables is |
| A. | 3 |
| B. | 5 |
| C. | 8 |
| D. | 16 |
| Answer» D. 16 | |
| 4710. |
In a decimal digital computer, the number 127 is stored |
| A. | 1111111 |
| B. | 0001 00100111 |
| C. | 10001 |
| D. | 11000111 |
| Answer» B. 0001 00100111 | |
| 4711. |
All digital circuits can be realised using only |
| A. | EX-OR gates |
| B. | Multiplexers |
| C. | Half adders |
| D. | OR gates |
| Answer» C. Half adders | |
| 4712. |
Adder is a combinational logic circuit. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 4713. |
As per Boolean algebra, inputs can be interchanged in |
| A. | OR gates |
| B. | AND gates |
| C. | both OR and AND gates |
| D. | none of the above |
| Answer» D. none of the above | |
| 4714. |
Four memory chips of 16 x 4 size have their address buses connected together. This system will be of size |
| A. | 64 x 4 |
| B. | 16 x 16 |
| C. | 32 x 8 |
| D. | 256 x 1 |
| Answer» C. 32 x 8 | |
| 4715. |
Full adder circuit can be implemented by |
| A. | Multiplexers |
| B. | Half adders |
| C. | AND or OR gates |
| D. | Decoders |
| Answer» B. Half adders | |
| 4716. |
The number of digits in hexadecimal system |
| A. | 15 |
| B. | 16 |
| C. | 10 |
| D. | 8 |
| Answer» C. 10 | |
| 4717. |
Medium scale integration refers to ICs with |
| A. | more than 12 but less than 30 gates on the same chip |
| B. | more than 50 gates on the same chip |
| C. | more than 20 but less than 100 gates on the same chip |
| D. | more than 12 but less than 100 gates on the same chip |
| Answer» E. | |
| 4718. |
The decimal equivalent of the hexadecimal number (3 E 8)16 is |
| A. | 1000 |
| B. | 982 |
| C. | 768 |
| D. | 323 |
| Answer» B. 982 | |
| 4719. |
Which of these is the most recent display device? |
| A. | LED |
| B. | LCD |
| C. | VF |
| D. | (a) and (c) |
| Answer» D. (a) and (c) | |
| 4720. |
In 2's complement form, - 2 is |
| A. | 1011 |
| B. | 1110 |
| C. | 1100 |
| D. | 1010 |
| Answer» C. 1100 | |
| 4721. |
The minimized version of logic circuit in the given figure is |
| A. | <img src="/_files/images/electronics-and-communication-engineering/digital-electronics/21-257-1.png"> |
| B. | <img src="/_files/images/electronics-and-communication-engineering/digital-electronics/21-257-2.png"> |
| C. | <img src="/_files/images/electronics-and-communication-engineering/digital-electronics/21-257-3.png"> |
| D. | <img src="/_files/images/electronics-and-communication-engineering/digital-electronics/21-257-4.png"> |
| Answer» B. <img src="/_files/images/electronics-and-communication-engineering/digital-electronics/21-257-2.png"> | |
| 4722. |
In the given figure shows a negative logic AND gate. If positive logic is used this gate is equivalent to |
| A. | AND gate |
| B. | OR gate |
| C. | NOR gate |
| D. | NAND gate |
| Answer» D. NAND gate | |
| 4723. |
Logic analyser is |
| A. | a multichannel oscilloscope |
| B. | similar to logic pulser |
| C. | similar to current tracer |
| D. | none of the above |
| Answer» B. similar to logic pulser | |
| 4724. |
The function Y = A B C + AB C + A B C + A BC is to be realized using discrete gates. The inputs available are A, B, C. We need a total of |
| A. | 8 gates |
| B. | 6 gates |
| C. | 10 gates |
| D. | 5 gates |
| Answer» B. 6 gates | |
| 4725. |
A 10 bit D/A converter gives a maximum output of 10.23 V. The resolution is |
| A. | 10 mV |
| B. | 20 mV |
| C. | 15 mV |
| D. | 25 mV |
| Answer» B. 20 mV | |
| 4726. |
For a 4096 x 8 EPROM, the number of address lines is |
| A. | 14 |
| B. | 12 |
| C. | 10 |
| D. | 8 |
| Answer» C. 10 | |
| 4727. |
Assertion (A): A PROM can be used as a synchronous counter Reason (R): Each memory location in a PROM can be read synchronously. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» E. | |
| 4728. |
As applied to a flip flop the word edge triggered's means |
| A. | flip flop can change state when clock transition occurs |
| B. | flip flop can change state when clock signal goes from LOW to HIGH only |
| C. | flip flop can change state when clock signal goes from HIGH to LOW only |
| D. | none of the above |
| Answer» B. flip flop can change state when clock signal goes from LOW to HIGH only | |
| 4729. |
Find the output voltage for 011100 in a 6 bit R-2R ladder D/A converter has a reference voltage of 6.5 V. |
| A. | 6.4 V |
| B. | 2.84 V |
| C. | 0.1 V |
| D. | 8 V |
| Answer» C. 0.1 V | |
| 4730. |
Binary number 1101 is equal to octal number |
| A. | 17 |
| B. | 16 |
| C. | 15 |
| D. | 14 |
| Answer» D. 14 | |
| 4731. |
A NOR gate is a combination of |
| A. | OR gate and AND gate |
| B. | AND gate and NOT gate |
| C. | OR gate and NOT gate |
| D. | two NOT gates |
| Answer» D. two NOT gates | |
| 4732. |
Decimal -90 equals __________ in 8 bit 2s complement |
| A. | 1000 1000 |
| B. | 1010 0110 |
| C. | 1100 1100 |
| D. | 0101 0101 |
| Answer» C. 1100 1100 | |
| 4733. |
23.610 = __________ 2 |
| A. | 11111.1001 |
| B. | 10111.1001 |
| C. | 00111.101 |
| D. | 10111.1 |
| Answer» C. 00111.101 | |
| 4734. |
The 2's complement representation of - 17 is |
| A. | 01110 |
| B. | 01111 |
| C. | 11110 |
| D. | 10001 |
| Answer» C. 11110 | |
| 4735. |
In a shift left register, shifting a bit by one bit means |
| A. | division by 2 |
| B. | multiplication by 2 |
| C. | subtraction of 2 |
| D. | None of the above |
| Answer» C. subtraction of 2 | |
| 4736. |
If A = B = 1, the outputs P and Q in the given figure are |
| A. | P = Q = 0 |
| B. | P = 0, Q = 1 |
| C. | P = 1, Q = 0 |
| D. | P = Q = 1 |
| Answer» C. P = 1, Q = 0 | |
| 4737. |
If A = 0101, then A' is |
| A. | 1010 |
| B. | 1011 |
| C. | 1001 |
| D. | 0110 |
| Answer» C. 1001 | |
| 4738. |
In the circuit of the given figure, Y = |
| A. | 0 |
| B. | 1 |
| C. | X |
| D. | <span style="text-decoration:overline;">X</span> |
| Answer» B. 1 | |
| 4739. |
A . 0 = |
| A. | 1 |
| B. | A |
| C. | 0 |
| D. | A or 1 |
| Answer» D. A or 1 | |
| 4740. |
In the given figure, Y = |
| A. | (A + B)C + DE |
| B. | AB + C(D + E) |
| C. | (A + B)C + D + E |
| D. | none of the above |
| Answer» B. AB + C(D + E) | |
| 4741. |
Assertion (A): The access time of memory is lowest in the case of DRAM Reason (R): DRAM uses refreshing cycle. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» E. | |
| 4742. |
In a 3 input NOR gate, the number of states in which output is 1 equals |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» B. 2 | |
| 4743. |
Assertion (A): Even if TTL gates and CMOS gates used in a realization have the same power supply of + 5 V, suitable circuit is needed to interconnect themReason (R): VOH, VOL, VIH and VIL of a TTL gave are respectively 2.4, 0.4, 2 and 0.8 V respectively. If supply voltage is + 5 V. VIL and VIH for CMOS gate for the supply voltage of + 5 V are 1.5 V and 3.5 V respectively. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» B. Both A and R are correct but R is not correct explanation of A | |
| 4744. |
The series 54 H/74 H denotes |
| A. | Standard TTL |
| B. | High speed TTL |
| C. | Low Power TTL |
| D. | High Power TTL |
| Answer» C. Low Power TTL | |
| 4745. |
The ALU carrier out arithmetic and logic operations (OR AND, NOT, etc.) it processes |
| A. | decimal numbers |
| B. | binary numbers |
| C. | hexadecimal numbers |
| D. | octal numbers |
| Answer» C. hexadecimal numbers | |
| 4746. |
TTL inverter has |
| A. | one input |
| B. | two inputs |
| C. | one or two inputs |
| D. | three inputs |
| Answer» C. one or two inputs | |
| 4747. |
The multiplication time for 10-bit numbers with 1 MHz clock will be |
| A. | 32 sec |
| B. | 20 sec |
| C. | 21 sec |
| D. | 22 sec |
| Answer» E. | |
| 4748. |
4 bit ripple counter and 4 bit synchronous counter are made using flip-flop having a propagation delay of 10 ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively, then |
| A. | R = 10 ns, S = 40 ns |
| B. | R = 40 ns, S = 10 ns |
| C. | R = 10 ns, S = 30 ns |
| D. | R = 30 ns, S = 10 ns |
| Answer» C. R = 10 ns, S = 30 ns | |
| 4749. |
If 4 in binary system is 100 then 8 will be |
| A. | 10 |
| B. | 100 |
| C. | 111 |
| D. | 1000 |
| Answer» E. | |
| 4750. |
In the given figure A = 1, B = 1. B is now changed to a sequence 101010................The outputs X and Y will be |
| A. | fixed at 0 and 1 respectively |
| B. | X = 1010.......and Y = 0101........ |
| C. | X = 1010..........and Y = 1010 |
| D. | fixed at 1 and 0 respectively. |
| Answer» B. X = 1010.......and Y = 0101........ | |