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This section includes 9294 Mcqs, each offering curated multiple-choice questions to sharpen your Engineering knowledge and support exam preparation. Choose a topic below to get started.
| 4801. |
The Z inverse of the given Z transform is : |
| A. | unit step |
| B. | unit impulse |
| C. | unit ramp |
| D. | unit parabola |
| Answer» C. unit ramp | |
| 4802. |
In the following circuit, the switch S is closed at t = 0 The rate of change of current (0 +) is given by |
| A. | 0 |
| B. | <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/5-01-8-2.png"> |
| C. | <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/5-01-8-3.png"> |
| D. | |
| Answer» C. <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/5-01-8-3.png"> | |
| 4803. |
The RMS value of the signal given below is: |
| A. | <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/1-744-24-2.png"> |
| B. | <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/1-744-24-3.png"> |
| C. | <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/1-744-24-4.png"> |
| D. | <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/1-744-24-5.png"> |
| Answer» C. <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/1-744-24-4.png"> | |
| 4804. |
Use block diagram reduction methods to obtain the equivalent T.F from R to C. |
| A. | <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/2-756-45-2.png"> |
| B. | <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/2-756-45-3.png"> |
| C. | <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/2-756-45-4.png"> |
| D. | <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/2-756-45-5.png"> |
| Answer» B. <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/2-756-45-3.png"> | |
| 4805. |
Find the FSV (full scale voltage) in a 6 bit R-2R ladder D/A converter has a reference voltage of 6.5 V. |
| A. | 6.4 V |
| B. | 0.1 V |
| C. | 7 V |
| D. | 8 V |
| Answer» B. 0.1 V | |
| 4806. |
Parallel adder is |
| A. | sequential circuit |
| B. | combinational circuit |
| C. | either sequential or combinational circuit |
| D. | none of the above |
| Answer» C. either sequential or combinational circuit | |
| 4807. |
An 8 bit binary number is to be entered into an 8 bit serial shift register. The number of clock pulses required is |
| A. | 1 |
| B. | 2 |
| C. | 4 |
| D. | 8 |
| Answer» E. | |
| 4808. |
In the given figure, A = B = 1 and C = D = 0. Then Y = |
| A. | 1 |
| B. | 0 |
| C. | either 1 or 0 |
| D. | indeterminate |
| Answer» C. either 1 or 0 | |
| 4809. |
Assertion (A): CMOS devices have very high speed.Reason (R): CMOS devices have very small physical size and simple geometry. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» E. | |
| 4810. |
A 4 bit down counter starts counting from 1111 irrespective of modulus. |
| A. | True |
| B. | False |
| Answer» C. | |
| 4811. |
TTL is used in electronic calculators. |
| A. | True |
| B. | False |
| Answer» C. | |
| 4812. |
Inverter 74 LS04 has following specifications I0H max = - 0.4 mA, I0L max = 8 mA, IIH max = 20 A, IIL max = 0.1 mAThe fan out of this inverter is |
| A. | 10 |
| B. | 20 |
| C. | 60 |
| D. | 100 |
| Answer» C. 60 | |
| 4813. |
A 4 bit ripple counter starts in 0000 state. When the counter reads 0010 the number of clock pulses which have occurred is |
| A. | 2 |
| B. | 18 |
| C. | 2 or 18 |
| D. | 2 or 18 or 34 |
| Answer» E. | |
| 4814. |
The number FF in hexadecimal system is equivalent to number __________ in decimal system. |
| A. | 256 |
| B. | 255 |
| C. | 240 |
| D. | 239 |
| Answer» C. 240 | |
| 4815. |
The inputs A, B, C of the given figure are applied to a 3 input NOR gate. The output is |
| A. | HIGH from 4 to 0 |
| B. | LOW from 0 to 4 |
| C. | HIGH from 0 to 1 and LOW from 1 to 4 |
| D. | LOW from 0 to 2 and HIGH from 2 to 4 |
| Answer» D. LOW from 0 to 2 and HIGH from 2 to 4 | |
| 4816. |
A 4 bit down counter can count from |
| A. | 0000 to 1111 |
| B. | 1111 to 0000 |
| C. | 000 to 111 |
| D. | 111 to 000 |
| Answer» C. 000 to 111 | |
| 4817. |
Assertion (A): In computers the data is stored in hexadecimal formReason (R): Hexadecimal representation is short as compared to binary representation. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» E. | |
| 4818. |
Using 2's complement, the largest positive and negative number which can be stored with 8 bits are |
| A. | +128 and -127 |
| B. | +128 and -128 |
| C. | +127 and -128 |
| D. | +127 and -127 |
| Answer» D. +127 and -127 | |
| 4819. |
Three Mod-16 counters are connected in cascade. The maximum counting range is |
| A. | 16 |
| B. | 256 |
| C. | 4096 |
| D. | none of the above |
| Answer» D. none of the above | |
| 4820. |
For the circuit of the given figure, the output equation is |
| A. | Y = ABCD |
| B. | Y = AB + CD |
| C. | Y = A + BCD |
| D. | Y = ABC + D |
| Answer» C. Y = A + BCD | |
| 4821. |
Assertion (A): XOR gate is not universal gate.Reason (R): It is not possible to realize any Boolean function using XOR gates only. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» B. Both A and R are correct but R is not correct explanation of A | |
| 4822. |
A DAC has full scale output of 5 V. If accuracy is 0.2% the maximum error for an output of 1 V is |
| A. | 5 mV |
| B. | 10 mV |
| C. | 2 mV |
| D. | 20 mV |
| Answer» C. 2 mV | |
| 4823. |
Binary number 1101101101 is equal to decimal number |
| A. | 3289 |
| B. | 2289 |
| C. | 1289 |
| D. | 289 |
| Answer» B. 2289 | |
| 4824. |
A 16:1 multiplexer has 4 select input lines. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 4825. |
Which one of the following can be used as parallel to series converter? |
| A. | Decoder |
| B. | Digital counter |
| C. | Multiplexer |
| D. | Demultiplexer |
| Answer» D. Demultiplexer | |
| 4826. |
A 4 bit modulo 16 ripple counter uses JK flip-flops. If the propagation delay of each FF is 50 ns. The max. clock frequency that can be used is equal to |
| A. | 20 MHz |
| B. | 10 MHz |
| C. | 5 MHz |
| D. | 4 MHz |
| Answer» D. 4 MHz | |
| 4827. |
What will be conversion time of a successive approximation A/D converter which uses 2 MHz clock and 5 bit binary ladder containing 8 V reference.? |
| A. | 2.5 sec |
| B. | 25 sec |
| C. | 3 sec |
| D. | 4 sec |
| Answer» B. 25 sec | |
| 4828. |
The input to a parity detector is 1001. The output is |
| A. | 0 |
| B. | 1 |
| C. | 0 or 1 |
| D. | indeterminate |
| Answer» B. 1 | |
| 4829. |
The number of switching functions of 3 variables are |
| A. | 3 |
| B. | 8 |
| C. | 16 |
| D. | 32 |
| Answer» C. 16 | |
| 4830. |
The applications of shift registers are Time delayRing counterSerial to parallel data conversionSerial to serial data conversion Which of the above are correct? |
| A. | 1, 2, 3 |
| B. | 2, 3, 4 |
| C. | 1, 2, 3, 4 |
| D. | 1, 2, 4 |
| Answer» D. 1, 2, 4 | |
| 4831. |
Assertion (A): ECL is fast as compared to TTL.Reason (R): ECL dissipates less power than TTL. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» D. A is false, R is true | |
| 4832. |
Assertion (A): Synchronous counter has higher speed of operation than ripple counter Reason (R): Synchronous counter uses high speed flip flops. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» D. A is false, R is true | |
| 4833. |
What will be the maximum conversion time in 6 bit dual slope A/D converter uses a reference of -6v and a 1 MHz clock. It uses a fixed count of 40 (101000). |
| A. | 108 sec |
| B. | 63 sec |
| C. | 40 sec |
| D. | 80 sec |
| Answer» B. 63 sec | |
| 4834. |
BCD number 1100111 = __________ 10 |
| A. | 66 |
| B. | 67 |
| C. | 68 |
| D. | 69 |
| Answer» C. 68 | |
| 4835. |
The K-map for a Boolean function is shown in figure. The number of essential prime implicants for this function is |
| A. | 4 |
| B. | 5 |
| C. | 6 |
| D. | 8 |
| Answer» B. 5 | |
| 4836. |
An AND gate has four inputs. One of the inputs is low and other inputs are high. The output |
| A. | is low |
| B. | is high |
| C. | is alternately low and high |
| D. | may be high or low depending on relative magnitudes of inputs |
| Answer» B. is high | |
| 4837. |
With four Boolean variables, how many Boolean expressions can be performed? |
| A. | 16 |
| B. | 256 |
| C. | 1024 (1 K) |
| D. | 64K (64 x 1024) |
| Answer» E. | |
| 4838. |
A + (B . C) = |
| A. | A . B + C |
| B. | A . B + A . C |
| C. | A |
| D. | (A + B) . (A + C) |
| Answer» E. | |
| 4839. |
To count 1000 bottles in a milk plant, the minimum number of flip flops requires is |
| A. | 12 |
| B. | 10 |
| C. | 8 |
| D. | 6 |
| Answer» C. 8 | |
| 4840. |
Decimal 8 in excess-3 code = |
| A. | 1000 |
| B. | 1001 |
| C. | 1011 |
| D. | 1111 |
| Answer» D. 1111 | |
| 4841. |
The inputs to a 3 bit binary adder are 1112 and 1102. The output will be |
| A. | 101 |
| B. | 1101 |
| C. | 1111 |
| D. | 1110 |
| Answer» C. 1111 | |
| 4842. |
As the number of flip flops are increased, the total propagation delay of |
| A. | ripple counter increases but that of synchronous counter remains the same |
| B. | both ripple and synchronous counters increase |
| C. | both ripple and synchronous counters remain the same |
| D. | ripple counter remains the same but that of synchronous counter increases |
| Answer» B. both ripple and synchronous counters increase | |
| 4843. |
For the ring oscillator shown in the figure, the propagation delay of each inverter is 100 pico sec. What is the fundamental frequency of the oscillator output __________ |
| A. | 10 MHz |
| B. | 100 MHz |
| C. | 1 GHz |
| D. | 2 GHz |
| Answer» E. | |
| 4844. |
If A is 1011, A" is |
| A. | 1011 |
| B. | 0100 |
| C. | 1100 |
| D. | 1010 |
| Answer» B. 0100 | |
| 4845. |
The number of flip flops needed for a Mod 7 counter are |
| A. | 7 |
| B. | 5 |
| C. | 3 |
| D. | 1 |
| Answer» D. 1 | |
| 4846. |
The number of logic devices required in a Mod-16 synchronous counter are |
| A. | 4 |
| B. | 5 |
| C. | 6 |
| D. | 7 |
| Answer» D. 7 | |
| 4847. |
A 2 bit BCD D/A converter is a weighted resistor type with ER = 1V, R = 1 M and Rf = 10K then Resolution in percent and volt is __________ . |
| A. | 1%, 1 mv |
| B. | 10%, 10 mv |
| C. | 10%, 1 mv |
| D. | 1%, 10 mv |
| Answer» E. | |
| 4848. |
The number of bits in EBCDIC is |
| A. | 12 |
| B. | 10 |
| C. | 8 |
| D. | 6 |
| Answer» D. 6 | |
| 4849. |
74 HC series can sink upto 4 mA. The 74 LS series has IIL(max) - 0.4 mA. How many 74 LS inputs be driven by 74 HC output? |
| A. | 100 |
| B. | none |
| C. | 8 |
| D. | 10 |
| Answer» E. | |
| 4850. |
An 8 bit transistor register has output voltage of low-high-low-high-low-high-low-high. The decimal number stored is |
| A. | 105 |
| B. | 95 |
| C. | 85 |
| D. | 75 |
| Answer» D. 75 | |