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This section includes 49 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Logic Design knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
The rounded corners of conditional box differentiate it from |
| A. | state box |
| B. | decision box |
| C. | data box |
| D. | conditional box |
| Answer» B. decision box | |
| 2. |
In ASM design flip-flops are considered to be |
| A. | negative edge triggered |
| B. | negative level triggered |
| C. | positive edge triggered |
| D. | negative level triggered |
| Answer» D. negative level triggered | |
| 3. |
The change of state in ASM chart is performed in |
| A. | control logic |
| B. | slave clock |
| C. | metadata |
| D. | processor |
| Answer» B. slave clock | |
| 4. |
A command used to start signals operation is indicated by |
| A. | INITIAL |
| B. | GO |
| C. | BEGIN |
| D. | START |
| Answer» E. | |
| 5. |
ASM stands for |
| A. | algorithmic state machine |
| B. | algorithmic solid machine |
| C. | arithmetic state machine |
| D. | arithmetic solid machine |
| Answer» B. algorithmic solid machine | |
| 6. |
To continue the count E must be |
| A. | enabled |
| B. | reset |
| C. | stopped |
| D. | cleared |
| Answer» E. | |
| 7. |
The logic design consists of |
| A. | 1 part |
| B. | 2 parts |
| C. | 3 parts |
| D. | 4 parts |
| Answer» C. 3 parts | |
| 8. |
Control implementation method is |
| A. | practical |
| B. | impractical |
| C. | enabled |
| D. | cleared |
| Answer» C. enabled | |
| 9. |
Binary information is classified into |
| A. | data |
| B. | control information |
| C. | metadata |
| D. | both a and b |
| Answer» E. | |
| 10. |
Large maps are used if flip-flops and inputs become greater than |
| A. | 2 |
| B. | 3 |
| C. | 5 |
| D. | 8 |
| Answer» D. 8 | |
| 11. |
One that is not a digital component is |
| A. | decoder |
| B. | encoder |
| C. | flip-flop |
| D. | mux |
| Answer» D. mux | |
| 12. |
The first level of design with multiplexer determines the register's |
| A. | present state |
| B. | input |
| C. | next state |
| D. | output |
| Answer» D. output | |
| 13. |
State box of ASM chart represents |
| A. | condition |
| B. | clock |
| C. | state |
| D. | pulse |
| Answer» D. pulse | |
| 14. |
A method used to specify the sequence of algorithm is |
| A. | map |
| B. | data |
| C. | flowchart |
| D. | operation |
| Answer» D. operation | |
| 15. |
One that is a digital component is |
| A. | latch |
| B. | encoder |
| C. | flip-flop |
| D. | processor |
| Answer» C. flip-flop | |
| 16. |
The timing for all flip-flops in digital system is controlled by |
| A. | Memory |
| B. | latches |
| C. | Master clock Generator |
| D. | None |
| Answer» C. Master clock Generator | |
| 17. |
Conditional box has a shape of |
| A. | square |
| B. | rectangle |
| C. | oval |
| D. | pentagon |
| Answer» D. pentagon | |
| 18. |
Symbolic notation R←0 represents |
| A. | Clear Register |
| B. | Move register |
| C. | Add contents to Register |
| D. | None |
| Answer» E. | |
| 19. |
Timings for registers are controlled by |
| A. | master clock |
| B. | slave clock |
| C. | serial clock |
| D. | parallel clock |
| Answer» B. slave clock | |
| 20. |
One that is not the element of ASM chart is |
| A. | state box |
| B. | decision box |
| C. | data box |
| D. | conditional box |
| Answer» D. conditional box | |
| 21. |
One that is not present in the list of state table is |
| A. | present state |
| B. | input |
| C. | next state |
| D. | previous state |
| Answer» E. | |
| 22. |
ASM chart is very same to |
| A. | state diagram |
| B. | flowchart |
| C. | data box |
| D. | operation |
| Answer» B. flowchart | |
| 23. |
Sequential circuit is also called |
| A. | state |
| B. | encoder |
| C. | flip-flop |
| D. | state machine |
| Answer» E. | |
| 24. |
The number of inputs and outputs in a state table are |
| A. | equal |
| B. | same |
| C. | unequal |
| D. | not present |
| Answer» B. same | |
| 25. |
The third level of design with multiplexer consists of |
| A. | Demultiplexer |
| B. | mux |
| C. | encoder |
| D. | decoder |
| Answer» E. | |
| 26. |
At E=1, register R will be |
| A. | enabled |
| B. | reset |
| C. | stopped |
| D. | cleared |
| Answer» E. | |
| 27. |
ASM chart takes entire block as |
| A. | 1 unit |
| B. | 2 unit |
| C. | 3 unit |
| D. | 4 unit |
| Answer» B. 2 unit | |
| 28. |
Box that tells the effect of input on control subsystem is called |
| A. | state box |
| B. | decision box |
| C. | data box |
| D. | conditional box |
| Answer» C. data box | |
| 29. |
Symbolic notation A←B represents |
| A. | Clear Register |
| B. | Set Flip-flop |
| C. | Increment register A |
| D. | Transfer contents of register B into A |
| Answer» E. | |
| 30. |
State box is a shape of |
| A. | square |
| B. | rectangle |
| C. | rhombus |
| D. | pentagon |
| Answer» C. rhombus | |
| 31. |
Sequential operations in digital system are described by |
| A. | map |
| B. | ASM chart |
| C. | flowchart |
| D. | graph |
| Answer» C. flowchart | |
| 32. |
Difference in conventional flowchart and ASM chart is |
| A. | master clock |
| B. | flow |
| C. | time relationship |
| D. | clock |
| Answer» D. clock | |
| 33. |
With every clock pulse count is |
| A. | decremented |
| B. | stopped |
| C. | incremented |
| D. | enabled |
| Answer» D. enabled | |
| 34. |
Design ASM with multiplexers, is the method consists of |
| A. | 1 level |
| B. | 2 levels |
| C. | 3 levels |
| D. | 4 levels |
| Answer» D. 4 levels | |
| 35. |
In state table when input pulses is greater than 5 it is necessary to use |
| A. | Small maps |
| B. | medium maps |
| C. | Large maps |
| D. | None |
| Answer» E. | |
| 36. |
One that is not a type of register |
| A. | storage |
| B. | shift register |
| C. | counter |
| D. | latch |
| Answer» E. | |
| 37. |
Discrete element of information is |
| A. | data |
| B. | control information |
| C. | metadata |
| D. | operation |
| Answer» B. control information | |
| 38. |
Another possible method of control logic design is to use |
| A. | 1 flip-flop |
| B. | 2 flip-flop |
| C. | 1 flip-flop per state |
| D. | None |
| Answer» C. 1 flip-flop per state | |
| 39. |
For going to the next state flip-flop is set to |
| A. | 1 |
| B. | 0 |
| C. | y |
| D. | don't cares |
| Answer» B. 0 | |
| 40. |
State box without decision and conditional box is |
| A. | asm block |
| B. | defined block |
| C. | simple block |
| D. | both a and b |
| Answer» D. both a and b | |
| 41. |
ASM chart resembles with |
| A. | map |
| B. | data |
| C. | flowchart |
| D. | operation |
| Answer» D. operation | |
| 42. |
Control sequence state is indicated by |
| A. | state box |
| B. | decision box |
| C. | data box |
| D. | conditional box |
| Answer» B. decision box | |
| 43. |
ASM chart is composed of |
| A. | 2 elements |
| B. | 3 elements |
| C. | 4 elements |
| D. | 5 elements |
| Answer» C. 4 elements | |
| 44. |
In designing ASM with multiplexers, the registers hold |
| A. | present binary state |
| B. | input |
| C. | next binary state |
| D. | output |
| Answer» B. input | |
| 45. |
All inputs are synchronized with |
| A. | master clock |
| B. | clock pulses |
| C. | counter |
| D. | latch |
| Answer» C. counter | |
| 46. |
A state table for a controller is a list of present states and inputs and their corresponding |
| A. | Pervious states and output |
| B. | next states and outputs |
| C. | current states |
| D. | None |
| Answer» B. next states and outputs | |
| 47. |
Control information gives knowledge about the |
| A. | command signals |
| B. | data |
| C. | metadata |
| D. | operation |
| Answer» B. data | |
| 48. |
ASM chart has |
| A. | 4 exits |
| B. | 3 exits |
| C. | 2 exits |
| D. | any number of exits |
| Answer» E. | |
| 49. |
If system is performing no function then it is in |
| A. | clear state |
| B. | initial state |
| C. | enable state |
| D. | reset state |
| Answer» C. enable state | |