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This section includes 50 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Logic Design knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
Memory elements in clocked sequential circuits are called |
| A. | latches |
| B. | flip-flop |
| C. | signals |
| D. | gates |
| Answer» C. signals | |
| 2. |
A flip-flop circuit can be constructed by two NAND gates or |
| A. | with Two AND gates |
| B. | with Two OR Gates |
| C. | with Two NOR gates |
| D. | None |
| Answer» D. None | |
| 3. |
Unused states are treated as Don't cares conditions during the |
| A. | Design of a circuit |
| B. | Execution |
| C. | Pulse trigger |
| D. | None |
| Answer» B. Execution | |
| 4. |
Flip-flops are sensitive to |
| A. | feedback path |
| B. | pulses |
| C. | signals |
| D. | pulse transition |
| Answer» E. | |
| 5. |
One that is not stated in a state table is |
| A. | present state |
| B. | next state |
| C. | input state |
| D. | clock state |
| Answer» E. | |
| 6. |
A circuit that goes through prescribed sequence of state is called |
| A. | flip-flops |
| B. | truth tables |
| C. | latches |
| D. | counters |
| Answer» E. | |
| 7. |
Which state a flip-flop circuits can maintain as long as a power is delivered to the circuit? |
| A. | n states |
| B. | tri state |
| C. | binary state |
| D. | octa state |
| Answer» D. octa state | |
| 8. |
In the last step of design procedure we |
| A. | draw map |
| B. | draw circuit |
| C. | draw table |
| D. | draw a logic diagram |
| Answer» E. | |
| 9. |
Clock generator, generates periodic train of |
| A. | feedback path |
| B. | gates |
| C. | clock pulses |
| D. | both a and b |
| Answer» D. both a and b | |
| 10. |
The negative transition in flip-flops are referred as |
| A. | clock |
| B. | negative edge |
| C. | positive edge |
| D. | both a and b |
| Answer» C. positive edge | |
| 11. |
The state diagram provides the same information as the |
| A. | flip-flops provides |
| B. | State table provides |
| C. | truth table provides |
| D. | both a and b |
| Answer» E. | |
| 12. |
Feedback among logic gates make asynchronous system |
| A. | stable |
| B. | unstable |
| C. | complex |
| D. | combinational |
| Answer» C. complex | |
| 13. |
The positive transition in flip-flops is referred as |
| A. | clock |
| B. | negative edge |
| C. | positive edge |
| D. | both a and b |
| Answer» D. both a and b | |
| 14. |
In Moore models, output are the function of only |
| A. | present state |
| B. | input state |
| C. | next state |
| D. | both a and b |
| Answer» B. input state | |
| 15. |
The state of flip-flop can be switched by changing its |
| A. | input signal |
| B. | output signal |
| C. | momentary signals |
| D. | all signals |
| Answer» B. output signal | |
| 16. |
The design procedure of sequential circuit is based on |
| A. | 7steps |
| B. | 8steps |
| C. | 9steps |
| D. | 10steps |
| Answer» D. 10steps | |
| 17. |
The major difference between various types of flip-flops are |
| A. | output that they generate |
| B. | input that they posses |
| C. | gates |
| D. | both a and b |
| Answer» C. gates | |
| 18. |
The flip-flops can be constructed with two |
| A. | NAND gates |
| B. | XOR gates |
| C. | AND gates |
| D. | NOT gates |
| Answer» B. XOR gates | |
| 19. |
The implication table consists of |
| A. | squares |
| B. | triangles |
| C. | cubes |
| D. | circles |
| Answer» B. triangles | |
| 20. |
Classification of sequential circuits depends upon their timing of |
| A. | feedback path |
| B. | gates |
| C. | signals |
| D. | complex circuits |
| Answer» D. complex circuits | |
| 21. |
The momentary change in the state of flip-flop is called |
| A. | feedback path |
| B. | tri state |
| C. | signals |
| D. | trigger |
| Answer» E. | |
| 22. |
Two states are said to be equal if they have exactly same |
| A. | inputs |
| B. | next state |
| C. | output |
| D. | both a and b |
| Answer» D. both a and b | |
| 23. |
Synchronous sequential circuits that uses clock are called |
| A. | clocked sequential circuits |
| B. | sequential circuits |
| C. | logic circuits |
| D. | complex circuits |
| Answer» B. sequential circuits | |
| 24. |
The next state of the D flip-flop is dependent on |
| A. | state diagram |
| B. | present state |
| C. | input state |
| D. | D state |
| Answer» E. | |
| 25. |
The time sequence for flip-flop can be enumerated by |
| A. | state table |
| B. | map |
| C. | truth table |
| D. | graph |
| Answer» B. map | |
| 26. |
The next state of B(t) will be |
| A. | B(t-1) |
| B. | B(t+1) |
| C. | B(t-2) |
| D. | B(t+2) |
| Answer» C. B(t-2) | |
| 27. |
A synchronous sequential circuit is made up of |
| A. | combinational gates |
| B. | flip-flops |
| C. | latches |
| D. | both a and b |
| Answer» E. | |
| 28. |
In T flip-flop when state of the T flip-flop has to be complemented the T must be |
| A. | 0 |
| B. | 1 |
| C. | t |
| D. | t+1 |
| Answer» C. t | |
| 29. |
M flip-flops produces |
| A. | 2^m-1 states |
| B. | 2-1 states |
| C. | 2^m+1 states |
| D. | 2^m states |
| Answer» E. | |
| 30. |
In Mealy models output are the functions of both |
| A. | present state |
| B. | input state |
| C. | next state |
| D. | both a and b |
| Answer» E. | |
| 31. |
Table that lists the inputs for required change of states is called |
| A. | truth table |
| B. | excitation table |
| C. | state table |
| D. | clock table |
| Answer» C. state table | |
| 32. |
JK Master-slave flip-flops are constructed with |
| A. | NAND gates |
| B. | OR gates |
| C. | AND gates |
| D. | NOT gates |
| Answer» B. OR gates | |
| 33. |
The operation of basic flip-flop can be changed by providing some additional control |
| A. | Input |
| B. | Output |
| C. | Inverter |
| D. | None |
| Answer» E. | |
| 34. |
Sequential circuits are |
| A. | Synchronous |
| B. | Asynchronous |
| C. | signals |
| D. | both a and b |
| Answer» E. | |
| 35. |
The behavior of sequential circuits are determined by the state of their |
| A. | clock |
| B. | pulses |
| C. | flip-flops |
| D. | trigger |
| Answer» D. trigger | |
| 36. |
The definite time in a flip-flop is called |
| A. | clear time |
| B. | pulse time |
| C. | hold time |
| D. | reset time |
| Answer» D. reset time | |
| 37. |
Direct coupled RS flip-flops are also called |
| A. | RS latch |
| B. | SR latch |
| C. | TS latch |
| D. | ST latch |
| Answer» C. TS latch | |
| 38. |
Clocked flip-flops are triggered by |
| A. | feedback path |
| B. | pulses |
| C. | signals |
| D. | clear |
| Answer» C. signals | |
| 39. |
The state of flip-flops are initialized with |
| A. | reset input |
| B. | master input |
| C. | master reset input |
| D. | both a and b |
| Answer» D. both a and b | |
| 40. |
A counter that flows the binary sequence is called |
| A. | ripple counter |
| B. | edge counter |
| C. | binary counter |
| D. | level counter |
| Answer» D. level counter | |
| 41. |
One that is not the type of flip-flop is |
| A. | JK |
| B. | T |
| C. | RS |
| D. | UT |
| Answer» E. | |
| 42. |
In the excitation table of D flip-flop the next state is equal to |
| A. | present state |
| B. | next state |
| C. | input state |
| D. | D state |
| Answer» E. | |
| 43. |
A master-slave combination can be constructed for any type of flip-flops by adding a clocked |
| A. | RS Flip-flop with an inverted clock for slave |
| B. | T flip-flop with NAND gate for slave |
| C. | Positive trigger for slave |
| D. | None |
| Answer» C. Positive trigger for slave | |
| 44. |
How many types a sequential circuits have? |
| A. | 2 |
| B. | 5 |
| C. | 6 |
| D. | None |
| Answer» B. 5 | |
| 45. |
Master-slave flip-flop consists of |
| A. | 2 flip-flops |
| B. | 3 flip-flops |
| C. | 4 flip-flops |
| D. | 5 flip-flops |
| Answer» B. 3 flip-flops | |
| 46. |
The don't care condition in a table is represented by |
| A. | a |
| B. | b |
| C. | c |
| D. | x |
| Answer» E. | |
| 47. |
Sequential circuits consists of |
| A. | combinational circuits |
| B. | sequential circuits |
| C. | logic circuits |
| D. | complex circuits |
| Answer» C. logic circuits | |
| 48. |
The reduction of flip-flops in a sequential circuits are referred as |
| A. | reduction |
| B. | state reduction |
| C. | next state |
| D. | both a and b |
| Answer» C. next state | |
| 49. |
The switch which clears the flip-flop to its initial state is called |
| A. | clock |
| B. | invert |
| C. | hold |
| D. | clear |
| Answer» E. | |
| 50. |
State table can be represented in a |
| A. | state diagram |
| B. | map |
| C. | truth table |
| D. | graph |
| Answer» B. map | |