Explore topic-wise MCQs in Physical Electronics Devices and ICs.

This section includes 521 Mcqs, each offering curated multiple-choice questions to sharpen your Physical Electronics Devices and ICs knowledge and support exam preparation. Choose a topic below to get started.

101.

In a properly biased transistor

A. Both depletion regions are small
B. Both depletion regions are large
C. The emitter to base depletion regions is large and collector to base depletion region is small
D. The emitter to base depletion region is small and collector to base depletion region is large
Answer» E.
102.

Sheet resistance for 1-mil thick silicon wafer with phosphorous doping of 1016/cm3 and boron doping of 2 1016/cm3 is

A. 300 /square
B. 200 /square
C. 350 /square
D. 240 /square
Answer» C. 350 /square
103.

Determine Vo if E1 = E2 = 10V

A. 9.3 V
B. 10 V
C. 1 V
D. 0 V
Answer» C. 1 V
104.

Assuming an operating temperature T = 300 K and corresponding VT = 26 mV, what is the change in semiconductor silicon diode forward voltage VD to produce a 10: 1 change in diode current ID, while operating in the forward bias region (

A. 60 mV
B. 120 mV
C. 180 mV
D. 240 mV
Answer» C. 180 mV
105.

Given for an FET, gm = 9.5 mA/volt. Total capacitance = 500 pF. For a voltage gain of 30 the bandwidth will be

A. 100 kHz
B. 630 kHz
C. 3 MHz
D. 19 MHz
Answer» B. 630 kHz
106.

A JEFT is set up as a source follower. Given = 200, rd = 100 K and source load resistor RL = 1 K. The output resistance R0 is given approximately by

A. 1000 ohm
B. 500 ohm
C. 333 ohm
D. 666 ohm
Answer» D. 666 ohm
107.

Consider the following statements: 1. The of a bipolar transistor reduces if the base width is increased. 2. The of a bipolar transistor increases if the doping concentration in the base is increased. Which one of the following is correct?

A. 1 is FALSE and 2 is TRUE
B. Both 1 and 2 are TRUE
C. Both 1 and 2 are FALSE
D. 1 is TRUE and 2 is FALSE
Answer» E.
108.

Consider the following statements 1. The threshold voltage (VT) of a MOS capacitor decreases with increase in gate oxide thickness. 2. The threshold voltage (VT) of a MOS capacitor decreases with increase in substrate doping concentration. Which of the statements given above are correct.

A. 1 is FALSE and 2 is TRUE
B. Both 1 and 2 are TRUE
C. Both 1 and 2 are FALSE
D. 1 is TRUE and 2 is FALSE
Answer» B. Both 1 and 2 are TRUE
109.

Compared to the junction transistor, FET: 1. Has a large gain bandwidth product 2. IS less noisy 3. Has less input resistance 4. Has only majority carrier flow The correct statements are

A. 1 and 3
B. 1 and 2
C. 2 and 4
D. 3 and 4
Answer» D. 3 and 4
110.

Match List-I (State of operation of an N-MOSFET) with List-II (Required condition) and select the correct answer using the code given below the lists List-I (a) OFF (b) Linear region(c) Non-linear (d) Saturation region List-II 1. Vgs > Vth and Vds < (Vgs Vth) 2. Vgs > Vth and Vds > (Vgs Vth) 3. Vgs > Vth 4. Vgs < Vth The correct code is

A. 2314
B. 4132
C. 2134
D. 4312
Answer» C. 2134
111.

Threshold voltage of MOSFET can be lowered by: (i) Reducing doping in substrate (ii) Increasing doping in substrate (iii) Decreasing gate oxide thickness The correct statement are

A. (iii) only
B. (i) and (iii) only
C. (i) and (ii) only
D. (ii) only
Answer» B. (i) and (iii) only
112.

Consider the following steps (1) Exposure to UV radiation (2) Etching (3) Stripping (4) Developing After coating with photoresist, the correct sequence of steps in photolithography

A. 2, 4, 3, 1
B. 4, 2, 3, 1
C. 1, 4, 2, 3
D. 1, 2, 3, 4
Answer» D. 1, 2, 3, 4
113.

VPO is the pinch off voltage for VGS = 0 in an FET. When the gate is reverse biased by VG S the pinch off voltage

A. Will be less than V
B. Will be more than V
C. Will be the same as V
D. Does not depend on V
Answer» B. Will be more than V
114.

Each diode in figure can be described by a cut-in voltage and zero resistance. If the cut-in voltage of diode D1 is 0 2V and of diode D2 is 0 6 V, the magnitude of current i1 through D1 is mA and magnitude of current through D2 is mA.

A. 20 mA, 0 mA
B. 10 mA, 0 mA
C. 15 mA, 0 mA
D. 25 mA, 0 mA
Answer» C. 15 mA, 0 mA
115.

Factors deciding the built in potential or barrier potential

A. The intrinsic concentration (n
B. ) before doping
C. The level of doping on p and n sides
D. Temperature
E. All of the above
Answer» E. All of the above
116.

What is the reverse recovery time of a diode when switched from forward bias VF to reverse bias VR?

A. Time taken to remove the stored minority carriers
B. Time taken by the diode voltage to attain zero value
C. Time to remove stored minority carriers plus the time to bring the diode voltage to reverse bias V
D. Time taken by the diode current to reverse
Answer» B. Time taken by the diode voltage to attain zero value
117.

The current ICEO is

A. The collector current in the common-emitter connected transistor with zero base current
B. The emitter current in the common-collected transistor with zero base current
C. The collector current in the common-emitter connected transistor with zero emitter current
D. The same as I
E.
Answer» E.
118.

Consider the JFET circuit given below Current ID is given by Assume ID = 12 1 + VGS2mA 4

A. 2 26 mA
B. 3 39 mA
C. 1 48 mA
D. 2 78 mA
Answer» B. 3 39 mA
119.

The diffusion length LP for hole in a semiconductor equals

A. DP P
B. (DP P)
C.
D.
Answer» D.
120.

In a transistor amplifier, the reverse saturation current I0 is

A. Doubled for every 10 C rise in temperature
B. Doubled for every 1 C rise in temperature
C. Increased linearly with temperature
D. Doubled for every 5 C rise in temperature
Answer» B. Doubled for every 1 C rise in temperature
121.

The circuit in figure shows a zener-regulated d.c. power supply. The zener diode voltage is 15 V. The minimum value of RL down to which the output voltage remains constant is

A. 27 ohm
B. 45 ohm
C. 15 ohm
D. 24 ohm
Answer» C. 15 ohm
122.

In the voltage regular circuit shown below the maximum load current iL that can be drawn is

A. 1.4 mA
B. 2.3 mA
C. 1.8 mA
D. 2.5 mA
Answer» B. 2.3 mA
123.

In monolithic IC fabrication process (i) All compounds are fabricated on single crystal of silicon (ii) Any value of capacitors and resistors can be fabricated (iii) Each transistor is diffused into separate isolation region (iv) Common process for different devices are carried out together

A. (i) only
B. (ii) and (iv) only
C. (i), (iii) and (iv) only
D. (i) and (iv) only
Answer» E.
124.

The NMOS transistor has VT = 0 7 V, n COX = 100 A/V2, L = 1 m, W = 32 m. If ID = 0 4 mA and VD = 0 5 V. The values of RD and RS are respectively given by

A. 5 , 3 25 k
B. 3 25 k , 5 k
C. 2 5 k , 6 5 k
D. None of these
Answer» D. None of these
125.

Basic function of SiO2 is (i) Physical strength (ii) Isolation (iii) Passivation from external contaminants (iv) Electrical connection (v) Selective diffusion

A. (ii) only
B. (iii) and (v) only
C. (ii), (iii) and (v) only
D. All
Answer» D. All
126.

In the circuit shown VCC = 10, RC = 2.7 K, RF = 200 K, = 99, VBE = 0.6V. The operating point VCE, IC are given by

A. 4.6 V and 1.98 mA
B. 3.18 V and 2.5 mA
C. 5.4 V and 1.56 mA
D. 4.2 V and 2.1 mA
Answer» B. 3.18 V and 2.5 mA
127.

For above question IE is

A. 1 pA
B. 2 pA
C. 3 pA
D. 50 pA
Answer» B. 2 pA
128.

For the series connected JFETs, IDSS = 8 mA and VPO = 4V. If VDD = 15V, RD = 5 k , RS = 2 k and RG = 1 M , find VDSQ.

A. 1 22 V
B. 2 44 V
C. 0 V
D. + 2 44 V
Answer» D. + 2 44 V
129.

In figure, capacitor C is charged to V0 = 50 V with upper plate positive. Switch S is closed at t = 0. Current through the circuit at t = 0 and final voltage across C are respectively

A. 15 A, 200 V
B. 20 A, 200 V
C. 25 A, 250 V
D. 15 A, 150 V
Answer» B. 20 A, 200 V
130.

Assume that D1 and D2 in figure are ideal iodes. The value of current is

A. 0 mA
B. 0 5 mA
C. 1 mA
D. 2 mA
Answer» B. 0 5 mA
131.

Under high electric fields, in a semiconductor increasing electric field 1. Mobility decreases 2. Mobility increases 3. Velocity saturates 4. Velocity increases The correct statements are:

A. 1 and 4 only
B. 1 and 3 only
C. All of the above
D. None of these
Answer» C. All of the above
132.

For the circuit shown in figure the value of IC is Vin = 0.63V, Ib = 125 A, IC = 275 A

A. 400 A
B. 400 A
C. 600 A
D. 600 A
Answer» C. 600 A
133.

Assuming that the diodes are ideal in figure, the current in diode D1 is

A. 8 mA
B. 5 mA
C. 0 mA
D. 3 mA
Answer» D. 3 mA
134.

The JFET in a circuit shown in figure has an IDSS = 10 mA and VP = 5V. The value of the resistance RS for a drain current IDI = 6 4 mA is (select the nearest value)

A. 150
B. 470
C. 560
D. 1 k
Answer» B. 470
135.

Match and select the correct answer using codes: List-I (a) Intrinsic semiconductor (b) p-type semiconductor (c) n-type semiconductor (d) Extrinsic semiconductor List-II 1. Acceptor type of impurity is added to semiconductor. 2. Donar type of impurity is added to semiconductor. 3. Doped semiconductor. 4. Electrical properties are same as that of the pure semiconductor.

A. 4123
B. 4321
C. 2143
D. 2341
Answer» B. 4321
136.

For the FET source follower circuit shown below, RS1 >> RS2 and transconductance gm and drain source resistance rds are 2 10 3 mho and 83 K respectively. The approximately value of input and output impedance are

A. 30 K, 390 ohms
B. 151 K, 1 K
C. 167 K, 500 ohms
D. 200 K, 1 K
Answer» D. 200 K, 1 K
137.

A common source FET amplifier has Cgs = 50 pF and Cgd = 5 pF. The value of source resistance RS for high 3 dB frequency of 100 kHz will be

A. 47
B. 35 K
C. 27 K
D. 10 K
Answer» D. 10 K
138.

In the circuit shown below, both transistor have the same VT. What is the approximate value of the highest possible output voltage Vout, if Vin can range from 0 to VDD? (Assume 0 < VT < VDD)

A. V
B. V
C. V
D. V
E. 0
Answer» B. V
139.

FET tuned amplifier with gm = 5 mA/V, rd = 20 k has a resonant impedance of 20 k . The gain resonance is given by

A. 200
B. 100
C. 50
D. 25
Answer» C. 50
140.

The transconductance of (FET)1 is 100 mho while the transconductance of (FET)2 is 50 mho. The gate is more effective in controlling the drain current in the case of

A. (FET)
B. (FET)
C. Both (FET)
D. and (FET)
E. Data is not sufficient
Answer» B. (FET)
141.

Regarding CC amplifier consider the statements 1 to 4 1. It perfoms a resistance transfomation from low to high resistance.2. Its current gain is close to unity 3. Its voltage gain is close to unity 4. The frequency range is higher than that of a CE syage. Of these the only true statements are:

A. 1, 2, 4
B. 1, 3
C. 2, 4
D. 3, 4
Answer» C. 2, 4
142.

In an emitter follwer with RL =10 K, given hfe = 99, hoe = (1/40) 10 3, hi e = 1 K the values of current gain and input resistance are given by

A. 25 and 250 K
B. 80 and 800 K
C. 99 and 900 K
D. 100 and 100 K
Answer» C. 99 and 900 K
143.

Assuming the forward diode drop as 0V, the output voltage V0, as shown in figure

A. 0V
B. 5V
C. 3 5V
D. 6 5V
Answer» D. 6 5V
144.

Given the h parameters for common emitter hi e = 1000 ohms, hfe = 49, hoc = 1 / 40 103 and hre = 0, the values of hib and 1 / hob are given by

A. 1000 ohms, 40 k ohms
B. 20 ohms, 800 ohms
C. 50 k ohms 40 k ohms
D. 20 ohms and 2 M ohms
Answer» E.
145.

For a transistor = 40 and IB = 25 A, the value of IE is

A. 1 mA
B. 0.975 mA
C. 1.025 mA
D. None of these
Answer» D. None of these
146.

Material used for fabrication of gate in modern MOSFET is

A. Highly pure Si
B. Highly pure SiO
C.
D. Si
E. Highly doped polysilicon
Answer» E. Highly doped polysilicon
147.

A CE amplifier has RL = 10 k ohms. Given hie = 1 k ohm, hfe = 50, hre = 0, 1/hoe = 40 K. The voltage gain AV is

A. 500
B. 400
C. 50
D. 40
Answer» C. 50
148.

The power rating required for the load resistance

A. 576 mW
B. 360 W
C. 480 mW
D. 75 W
Answer» B. 360 W
149.

The buried layer in an integrated circuit is

A. Undoped
B. Doped
C. Located in the base region
D. Used to reduce the parasitic capacitance
Answer» C. Located in the base region
150.

The chemical react on involved in epitaxial growth in IC chips takes place at a temperature of about

A. 500 C
B. 800 C
C. 1200 C
D. 2000 C
Answer» D. 2000 C