MCQOPTIONS
Saved Bookmarks
This section includes 358 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Science Engineering (CSE) knowledge and support exam preparation. Choose a topic below to get started.
| 101. |
Metal links are made up of |
| A. | polycrystalline |
| B. | magnesium sulphide |
| C. | nichrome |
| D. | silicon dioxide |
| Answer» D. silicon dioxide | |
| 102. |
How many types of fuse technologies are used in PROMs? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» C. 4 | |
| 103. |
During programming p-n junction is |
| A. | avalanche reverse biased |
| B. | avalanche forward biased |
| C. | zener reverse biased |
| D. | zener reverse biased |
| Answer» B. avalanche forward biased | |
| 104. |
The cell type used inside a PROM is |
| A. | link cells |
| B. | metal cells |
| C. | fuse cells |
| D. | electric cells |
| Answer» D. electric cells | |
| 105. |
Fusing process is |
| A. | reversible |
| B. | irreversible |
| C. | synchronous |
| D. | asynchronous |
| Answer» C. synchronous | |
| 106. |
What is a fusing process? |
| A. | it is a process by which data is passed to the memory |
| B. | it is a process by which data is read through the memory |
| C. | it is a process by which programs are burnout to the diode/transistors |
| D. | it is a process by which data is fetched through the memory |
| Answer» D. it is a process by which data is fetched through the memory | |
| 107. |
Which part of a Flash memory architecture manages all chip functions? |
| A. | program verify code |
| B. | floating-gate mosfet |
| C. | command code |
| D. | input/output pins |
| Answer» C. command code | |
| 108. |
How much locations an 8-bit address code can select in memory? |
| A. | 8 locations |
| B. | 256 locations |
| C. | 65,536 locations |
| D. | 131,072 locations |
| Answer» C. 65,536 locations | |
| 109. |
How can ultraviolet erasable PROMs be recognized? |
| A. | there is a small window on the chip |
| B. | they will have a small violet dot next to the #1 pin |
| C. | their part number always starts with a “uâ€, such as in u12 |
| D. | they are not readily identifiable, since they must always be kept under a small cover |
| Answer» B. they will have a small violet dot next to the #1 pin | |
| 110. |
Which of the following best describes the fusible-link PROM? |
| A. | manufacturer-programmable, reprogrammable |
| B. | manufacturer-programmable, one-time programmable |
| C. | user-programmable, reprogrammable |
| D. | user-programmable, one-time programmable |
| Answer» E. | |
| 111. |
Which of the following is programmed electrically by the user? |
| A. | rom |
| B. | eprom |
| C. | prom |
| D. | eeprom |
| Answer» D. eeprom | |
| 112. |
PROMs are available in |
| A. | bipolar and mosfet technologies |
| B. | mosfet and fet technologies |
| C. | fet and bipolar technologies |
| D. | mos and bipolar technologies |
| Answer» E. | |
| 113. |
Why did PROM introduced? |
| A. | to increase the storage capacity |
| B. | to increase the address locations |
| C. | to provide flexibility |
| D. | to reduce the size |
| Answer» D. to reduce the size | |
| 114. |
The time from the beginning of a read cycle to the end of tACS/tAA is called as |
| A. | write enable time |
| B. | data hold |
| C. | read cycle time |
| D. | access time |
| Answer» E. | |
| 115. |
The parallel outputs of a counter circuit represent the |
| A. | parallel data word |
| B. | clock frequency |
| C. | counter modulus |
| D. | clock count |
| Answer» E. | |
| 116. |
Three decade counter would have |
| A. | 2 bcd counters |
| B. | 3 bcd counters |
| C. | 4 bcd counters |
| D. | 5 bcd counters |
| Answer» C. 4 bcd counters | |
| 117. |
BCD counter is also known as |
| A. | parallel counter |
| B. | decade counter |
| C. | synchronous counter |
| D. | vlsi counter |
| Answer» C. synchronous counter | |
| 118. |
Synchronous counter is a type of |
| A. | ssi counters |
| B. | lsi counters |
| C. | msi counters |
| D. | vlsi counters |
| Answer» D. vlsi counters | |
| 119. |
A decimal counter has states. |
| A. | 5 |
| B. | 10 |
| C. | 15 |
| D. | 20 |
| Answer» C. 15 | |
| 120. |
Ripple counters are also called |
| A. | ssi counters |
| B. | asynchronous counters |
| C. | synchronous counters |
| D. | vlsi counters |
| Answer» C. synchronous counters | |
| 121. |
How many types of the counter are there? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» C. 4 | |
| 122. |
A counter circuit is usually constructed of |
| A. | a number of latches connected in cascade form |
| B. | a number of nand gates connected in cascade form |
| C. | a number of flip-flops connected in cascade |
| D. | a number of nor gates connected in cascade form |
| Answer» D. a number of nor gates connected in cascade form | |
| 123. |
In digital logic, a counter is a device which |
| A. | counts the number of outputs |
| B. | stores the number of times a particular event or process has occurred |
| C. | stores the number of times a clock pulse rises and falls |
| D. | counts the number of inputs |
| Answer» C. stores the number of times a clock pulse rises and falls | |
| 124. |
What will be the 4-bit pattern after the second clock pulse? (Right-most bit first) |
| A. | 1100 |
| B. | 0011 |
| C. | 0000 |
| D. | 1111 |
| Answer» D. 1111 | |
| 125. |
How can parallel data be taken out of a shift register simultaneously? |
| A. | use the q output of the first ff |
| B. | use the q output of the last ff |
| C. | tie all of the q outputs together |
| D. | use the q output of each ff |
| Answer» E. | |
| 126. |
What is meant by parallel load of a shift register? |
| A. | all ffs are preset with data |
| B. | each ff is loaded with data, one at a time |
| C. | parallel shifting of data |
| D. | all ffs are set with data |
| Answer» B. each ff is loaded with data, one at a time | |
| 127. |
After three clock pulses, the register contains |
| A. | 01110 |
| B. | 00001 |
| C. | 00101 |
| D. | 00110 |
| Answer» D. 00110 | |
| 128. |
The full form of SIPO is |
| A. | serial-in parallel-out |
| B. | parallel-in serial-out |
| C. | serial-in serial-out |
| D. | serial-in peripheral-out |
| Answer» B. parallel-in serial-out | |
| 129. |
The designation means that the |
| A. | up count is active-high, the down count is active-low |
| B. | up count is active-low, the down count is active-high |
| C. | up and down counts are both active-low |
| D. | up and down counts are both active-high |
| Answer» B. up count is active-low, the down count is active-high | |
| 130. |
A modulus-10 counter must have _ |
| A. | 10 flip-flops |
| B. | 4 flip-flops |
| C. | 2 flip-flops |
| D. | synchronous clocking |
| Answer» C. 2 flip-flops | |
| 131. |
Which is not an example of a truncated modulus? |
| A. | 8 |
| B. | 9 |
| C. | 11 |
| D. | 15 |
| Answer» B. 9 | |
| 132. |
In 4-bit up-down counter, how many flip-flops are required? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» D. 5 | |
| 133. |
Once an up-/down-counter begins its count sequence, it |
| A. | starts counting |
| B. | can be reversed |
| C. | can’t be reversed |
| D. | can be altered |
| Answer» E. | |
| 134. |
Binary counter that count incrementally and decrement is called |
| A. | up-down counter |
| B. | lsi counters |
| C. | down counter |
| D. | up counter |
| Answer» B. lsi counters | |
| 135. |
In DOWN-counter, each flip-flop is triggered by |
| A. | the output of the next flip-flop |
| B. | the normal output of the preceding flip-flop |
| C. | the clock pulse of the previous flip-flop |
| D. | the inverted output of the preceding flip-flop |
| Answer» E. | |
| 136. |
In an UP-counter, each flip-flop is triggered by |
| A. | the output of the next flip-flop |
| B. | the normal output of the preceding flip-flop |
| C. | the clock pulse of the previous flip-flop |
| D. | the inverted output of the preceding flip-flop |
| Answer» C. the clock pulse of the previous flip-flop | |
| 137. |
UP-DOWN counter is also known as |
| A. | dual counter |
| B. | multi counter |
| C. | multimode counter |
| D. | two counter |
| Answer» D. two counter | |
| 138. |
UP-DOWN counter is a combination of |
| A. | latches |
| B. | flip-flops |
| C. | up counter |
| D. | up counter & down counter |
| Answer» E. | |
| 139. |
A 4-bit counter has a maximum modulus of |
| A. | 3 |
| B. | 6 |
| C. | 8 |
| D. | 16 |
| Answer» E. | |
| 140. |
The terminal count of a typical modulus-10 binary counter is |
| A. | 0000 |
| B. | 1010 |
| C. | 1001 |
| D. | 1111 |
| Answer» D. 1111 | |
| 141. |
How many flip-flops are required to construct a decade counter? |
| A. | 4 |
| B. | 8 |
| C. | 5 |
| D. | 10 |
| Answer» B. 8 | |
| 142. |
Internal propagation delay of asynchronous counter is removed by |
| A. | ripple counter |
| B. | ring counter |
| C. | modulus counter |
| D. | synchronous counter |
| Answer» E. | |
| 143. |
One of the major drawbacks to the use of asynchronous counters is that |
| A. | low-frequency applications are limited because of internal propagation delays |
| B. | high-frequency applications are limited because of internal propagation delays |
| C. | asynchronous counters do not have major drawbacks and are suitable for use in high- and low-frequency counting applications |
| D. | asynchronous counters do not have propagation delays, which limits their use in high- frequency applications |
| Answer» C. asynchronous counters do not have major drawbacks and are suitable for use in high- and low-frequency counting applications | |
| 144. |
A ripple counter’s speed is limited by the propagation delay of |
| A. | each flip-flop |
| B. | all flip-flops and gates |
| C. | the flip-flops only with gates |
| D. | only circuit gates |
| Answer» B. all flip-flops and gates | |
| 145. |
How many natural states will there be in a 4-bit ripple counter? |
| A. | 4 |
| B. | 8 |
| C. | 16 |
| D. | 32 |
| Answer» D. 32 | |
| 146. |
What is the difference between static RAM and dynamic RAM? |
| A. | static ram must be refreshed, dynamic ram does not |
| B. | there is no difference |
| C. | dynamic ram must be refreshed, static ram does not |
| D. | sram is slower than dram |
| Answer» D. sram is slower than dram | |
| 147. |
ROMs retain data when |
| A. | power is on |
| B. | power is off |
| C. | system is down |
| D. | all of the mentioned |
| Answer» E. | |
| 148. |
When a RAM module passes the checker board test it is |
| A. | able to read and write only 0s |
| B. | faulty |
| C. | probably good |
| D. | able to read and write only 1s |
| Answer» D. able to read and write only 1s | |
| 149. |
How many addresses a MOS EPROM have? |
| A. | 1024 |
| B. | 512 |
| C. | 2516 |
| D. | 256 |
| Answer» D. 256 | |
| 150. |
Which one of the following is used for the fabrication of MOS EPROM? |
| A. | tms 2513 |
| B. | tms 2515 |
| C. | tms 2516 |
| D. | tms 2518 |
| Answer» D. tms 2518 | |