MCQOPTIONS
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MCQOPTIONS
This section includes 1917 Mcqs, each offering curated multiple-choice questions to sharpen your UGC-NET knowledge and support exam preparation. Choose a topic below to get started.
| 651. |
In which addressing mode the operand is given explicitly in the instruction itself? |
| A. | Absolute mode |
| B. | Immediate mode |
| C. | Indirect mode |
| D. | Index mode |
| Answer» C. Indirect mode | |
| 652. |
8085 microprocessor has ............... bit ALU. |
| A. | 32 |
| B. | 16 |
| C. | 8 |
| D. | 4 |
| Answer» D. 4 | |
| 653. |
In 8085 microprocessor, the digit 5 indicates that the microprocessor needs |
| A. | -5 volts, +5 volts supply |
| B. | +5 volts supply only |
| C. | -5 volts supply only |
| D. | 5 MHz clock |
| Answer» C. -5 volts supply only | |
| 654. |
In 8085, which of the following performs: load register pair immediate operation? |
| A. | LDAX rp |
| B. | LHLD addr |
| C. | LXI rp, data |
| D. | INX rp |
| Answer» D. INX rp | |
| 655. |
If 4 input multiplexers drive a 4 input multiplexer, we get a: |
| A. | 16 input MUX |
| B. | 8 input MUX |
| C. | 4 input MUX |
| D. | 2 input MUX |
| Answer» B. 8 input MUX | |
| 656. |
A ripple counter is a (n): |
| A. | Synchronous Counter |
| B. | Asynchronous counter |
| C. | Parallel counter |
| D. | None of the above |
| Answer» C. Parallel counter | |
| 657. |
The general configuration of the microprogrammed control unit is given below. What are blocks B and C in the diagram respectively? |
| A. | Block address register and cache memory |
| B. | Control address register and control memory |
| C. | Branch register and cache memory |
| D. | Control address register and random access memory |
| Answer» C. Branch register and cache memory | |
| 658. |
The content of the accumulator after the execution of the following 8085 assembly language program, isMVI A, 35HMOV B, ASTCCMCRARXRA B |
| A. | 00H |
| B. | 35H |
| C. | EFH |
| D. | 2FH |
| Answer» E. | |
| 659. |
Which of the following statements is incorrect for Parallel Virtual Machine (PVM)? |
| A. | The PVM Communication model provides asynchronous blocking send, asynchronous blocking receive and non-blocking receive function |
| B. | Message buffers are allocated dynamically |
| C. | The PVM communication model assumes that any task that can send a message to any other PVM task and that there is no limit to the size or number of such messages |
| D. | In PVM Model, the message order is not preserved |
| Answer» E. | |
| 660. |
Match the following:Addressing Mode Location of operanda. Implied i. Registers which are in CPUb. Immediate ii. Register specifies the addressof the operandc. Register iii. Specified in the registerd. Register Indirect iv. Specified implicitly in thedefinition of instructionCodes: a b c d |
| A. | iv iii i ii |
| B. | iv i iii ii |
| C. | iv ii i iii |
| D. | iv iii ii i |
| Answer» B. iv i iii ii | |
| 661. |
The register that stores the bits required to mask the interrupts is ................ |
| A. | Status register |
| B. | Interrupt service register |
| C. | Interrupt mask register |
| D. | Interrupt request register |
| Answer» D. Interrupt request register | |
| 662. |
Consider a full adder with the following input values :(a) x=1, y=0 and Ci(carry input) = 0(b) x=0, y=1 and Ci = 1Compute the values of S(sum) and C0 (carry output) for the above input values. |
| A. | S=1 , C0= 0 and S=0 , C0= 1 |
| B. | S=0 , C0= 0 and S=1 , C0= 1 |
| C. | S=1 , C0= 1 and S=0 , C0= 0 |
| D. | S=0 , C0= 1 and S=1 , C0= 0 |
| Answer» B. S=0 , C0= 0 and S=1 , C0= 1 | |
| 663. |
In the case of parallelization, Amdahl's law states that if P is the proportion of the program that can be made parallel and (1 - P) is the proportion that cannot be parallelized , then the maximum speed that can be achieved by using N processors is |
| A. | 1/ (1-P) + (N.P) |
| B. | 1/ (N-1) P +P |
| C. | 1/ (1-P) + P/N |
| D. | 1/ P + ((1-P)/N) |
| Answer» D. 1/ P + ((1-P)/N) | |
| 664. |
Consider the following statements :(a) Boolean expressions and logic networks correspond to labelled acyclic digraphs.(b) Optimal Boolean expressions may not correspond to simplest networks.(c) Choosing essential blocks first in a Karnaugh map and then greedily choosing the largest remaining blocks to cover may not give an optimal expression.Which of these statement(s) is/ are correct |
| A. | (a) only |
| B. | (b) only |
| C. | (a) and (b) |
| D. | (a), (b) and (c) |
| Answer» E. | |
| 665. |
A binary 3-bit down counter uses J-K flip-flops, FFi with inputs Ji, Ki and outputs Qi, i=0,1,2 respectively. The minimized expression for the input from following, isI. J0=K0=0II. J0=K0=1III. J1=K1=Q0IV. J1=K1=Q'0V. J2=K2=Q1Q0Vl. J2=K2=Q'1Q'0 |
| A. | I, Ill, V |
| B. | I, IV, VI |
| C. | Il, III, V |
| D. | Il, IV, Vl |
| Answer» E. | |
| 666. |
The advantage of _______ is that it can reference memory without paying the price of having a full memory address in the instruction. |
| A. | Direct addressing |
| B. | Indexed addressing |
| C. | Register addressing |
| D. | Register Indirect addressing |
| Answer» E. | |
| 667. |
Pipelining improves performance by: |
| A. | decreasing instruction latency |
| B. | eliminating data hazards |
| C. | exploiting instruction level parallelism |
| D. | decreasing the cache miss rate |
| Answer» D. decreasing the cache miss rate | |
| 668. |
The output of a sequential circuit depends on |
| A. | present input only |
| B. | past input only |
| C. | both present and past input |
| D. | past output only |
| Answer» D. past output only | |
| 669. |
Which of the following flip-flops is free from race condition ? |
| A. | T flip-flop |
| B. | SR flip-flop |
| C. | Master-slave JK flip-flop |
| D. | None of the above |
| Answer» D. None of the above | |
| 670. |
ECL is the fastest of all logic families. High Speed in ECL is possible because transistors are used in difference amplifier configuration, in which they are never driven into ............... |
| A. | Race condition |
| B. | Saturation |
| C. | Delay |
| D. | High impedance |
| Answer» C. Delay | |
| 671. |
Simplified form of the Boolean expression Y=A’BC’D’+ABC’D’+A’BCD’+ABCD’ is: |
| A. | C’D’ |
| B. | CD’ |
| C. | BD’ |
| D. | BC’ |
| Answer» D. BC’ | |
| 672. |
Which of the following is not valid with reference to Message Passing Interface (MPI) ? |
| A. | MPI can run on any hardware platform |
| B. | The programming model is a distributed memory model |
| C. | All parallelism is implicit |
| D. | MPI - Comm - Size returns the total number of MPI processes in specified communication |
| Answer» D. MPI - Comm - Size returns the total number of MPI processes in specified communication | |
| 673. |
The CPU of a system having 1 MIPS execution rate needs 4 machine cycles on an average for executing an instruction. The fifty percent of the cycles use memory bus. A memory read/ write employs one machine cycle. For execution of the programs, the system utilizes 90 percent of the CPU time. For block data transfer, an IO device is attached to the system while CPU executes the background programs continuously. What is the maximum IO data transfer rate if programmed IO data transfer technique is used? |
| A. | 500 Kbytes/sec |
| B. | 2.2 Mbytes/sec |
| C. | 125 Kbytes/sec |
| D. | 250 Kbytes/sec |
| Answer» E. | |
| 674. |
The number of flip-flops required to design a modulo - 272 counter is : |
| A. | 8 |
| B. | 9 |
| C. | 27 |
| D. | 11 |
| Answer» C. 27 | |
| 675. |
For the 8 - bit word 00111001, the check bits stored with it would be 0111. Suppose when the word is read from memory, the check bits are calculated to be 1101. What is the data word that was read from memory? |
| A. | 10011001 |
| B. | 00011001 |
| C. | 00111000 |
| D. | 11000110 |
| Answer» C. 00111000 | |
| 676. |
Which of the following in 8085 microprocessor performsHL = HL + HL ? |
| A. | DAD D |
| B. | DAD H |
| C. | DAD B |
| D. | DAD SP |
| Answer» C. DAD B | |
| 677. |
A computer uses a memory unit with 256 K words of 32 bits each. A binary instruction code is stored in one word of memory. The instruction has four parts: an indirect bit, an operation code and a register code part to specify one of 64 registers and an address part. How many bits are there in the operation code, the register code part and the address part? |
| A. | 7,6,18 |
| B. | 6,7,18 |
| C. | 7,7,18 |
| D. | 18,7,7 |
| Answer» B. 6,7,18 | |
| 678. |
The output of the following combinational circuit is F. The value of F is : |
| A. | P1+P2’P3 |
| B. | P1+P2’P3’ |
| C. | P1+P2P3’ |
| D. | P1’+P2P3 |
| Answer» C. P1+P2P3’ | |
| 679. |
A micro-instruction format has micro-ops field which is divided into three subfields F1, F2, F3 each having seven distinct micro-operations, condition field CD for four status bits, branch field BR having four options used in conjunction with address field ADF. The address space is of 128 memory locations. The size of micro-instruction is: |
| A. | 17 bits |
| B. | 20 bits |
| C. | 24 bits |
| D. | 32 bits |
| Answer» C. 24 bits | |
| 680. |
Which of the following is correct statement? |
| A. | In memory - mapped I/O, the CPU can manipulate I/O data residing in interface registers that are not used to manipulate memory words. |
| B. | The isolated I/O method isolates memory and I/O addresses so that memory address range is not affected by interface address assignment. |
| C. | In asynchronous serial transfer of data the two units share a common clock. |
| D. | In synchronous serial transmission of data the two units have different clocks. |
| Answer» C. In asynchronous serial transfer of data the two units share a common clock. | |
| 681. |
In RS flip-flop, the output of the flip-flop at time (t+1) is same as the output at time t, after the occurance of a clock pulse if: |
| A. | S=R=1 |
| B. | S=0, R=1 |
| C. | S=1, R=0 |
| D. | S=R=0 |
| Answer» E. | |
| 682. |
Which of the following addressing mode is best suited to access elements of an array of contiguous memory locations? |
| A. | Indexed addressing mode |
| B. | Base Register addressing mode |
| C. | Relative address mode |
| D. | Displacement mode |
| Answer» B. Base Register addressing mode | |
| 683. |
In the architecture of 8085 microprocessor match the following:List - I(a) Processing unit(b) Instruction unit(c) Storage and Interface unitList - II(i) Interrupt(ii) General purpose Register(iii) ALU(iv) Timing and ControlCode : (a) (b) (c) |
| A. | (iv) (i) (ii) |
| B. | (iii) (iv) (ii) |
| C. | (ii) (iii) (i) |
| D. | (i) (ii) (iv) |
| Answer» C. (ii) (iii) (i) | |
| 684. |
In 8085 microprocessor which of the following flag(s) is (are) affected by an arithmetic operation? |
| A. | AC flag Only |
| B. | CY flag Only |
| C. | Z flag Only |
| D. | AC, CY, Z flags |
| Answer» E. | |
| 685. |
The Boolean function with the following Karnaugh map is : |
| A. | (A + C).D + B |
| B. | (A + B).C + D |
| C. | (A + D).C + B |
| D. | (A + C).B + D |
| Answer» B. (A + B).C + D | |
| 686. |
Advantage of synchronous sequential circuits over asynchronous ones is |
| A. | faster operation |
| B. | ease of avoiding problems due to hazard |
| C. | lower hardware requirement |
| D. | better noise immunity |
| Answer» B. ease of avoiding problems due to hazard | |
| 687. |
What is the transitive voltage for the voltage input of a CMOS operating from 10V supply? |
| A. | 1V |
| B. | 2V |
| C. | 5V |
| D. | 10 V |
| Answer» D. 10 V | |
| 688. |
The Octal equivalent of the binary number 1011101011 is: |
| A. | 7353 |
| B. | 1353 |
| C. | 5651 |
| D. | 5657 |
| Answer» C. 5651 | |
| 689. |
A specific editor has 200 K of program text, 15 K of initial stack, 50 K of initialized data, and 70 K of bootstrap code. If five editors are started simultaneously, how much physical memory is needed if shared text is used? |
| A. | 1135 K |
| B. | 335 K |
| C. | 1065 K |
| D. | 320 K |
| Answer» D. 320 K | |
| 690. |
Identify the devices given below with their IC numbers :(i) USART (a) 8251(ii) Micro controller (b) 8051(iii) Interrupt controller (c) 8259(iv) DMA controller (d) 8257 (i) (ii) (iii) (iv) |
| A. | (a) (b) (c) (d) |
| B. | (b) (a) (d) (c) |
| C. | (c) (d) (a) (b) |
| D. | (d) (a) (b) (c) |
| Answer» B. (b) (a) (d) (c) | |
| 691. |
Among the logic families RTL, TTL, ECL and CMOS, the fastest family is: |
| A. | ECL |
| B. | CMOS |
| C. | TTL |
| D. | RTL |
| Answer» B. CMOS | |
| 692. |
The characteristic equation of D flip-flop is: |
| A. | Q=1 |
| B. | Q=0 |
| C. | Q=D’ |
| D. | Q=D |
| Answer» E. | |
| 693. |
A reduced state table has 18 rows. The minimum number of flip flops needed to implement the sequential machine is: |
| A. | 18 |
| B. | 9 |
| C. | 5 |
| D. | 4 |
| Answer» D. 4 | |
| 694. |
A latch is constructed using two cross-coupled |
| A. | AND and OR gates |
| B. | AND gates |
| C. | NAND and NOR gates |
| D. | NAND gates |
| Answer» E. | |
| 695. |
The maximum size of main memory of a computer is determined by: |
| A. | Operating System |
| B. | Address Bus |
| C. | Data Bus |
| D. | Chipset |
| Answer» C. Data Bus | |
| 696. |
In 8085 microprocessor, what is the output of following program?LDA 8000HMVI B, 30HADD BSTA 8001H |
| A. | Read a number from input port and store it in memory |
| B. | Read a number from input device with address 8000H and store it in memory at location 8001H |
| C. | Read a number from memory at location 8000H and store it in memory location 8001H |
| D. | Load A with data from input device with address 8000H and display it on the output device with address 8001H |
| Answer» E. | |
| 697. |
Essential hazards may occur in: |
| A. | Combinational logic circuits |
| B. | Synchronous sequential logic circuits |
| C. | Asynchronous sequential logic circuits working in the fundamental mode |
| D. | Asynchronous sequential logic circuits working in the pulse mode |
| Answer» D. Asynchronous sequential logic circuits working in the pulse mode | |
| 698. |
In 8085 microprocessor the address bus is of .................... bits. |
| A. | 4 |
| B. | 8 |
| C. | 16 |
| D. | 32 |
| Answer» D. 32 | |
| 699. |
Consider a 32 - bit microprocessor, with a 16 - bit external data bus, driven by an 8 MHz input clock. Assume that this microprocessor has a bus cycle whose minimum duration equals four input clock cycles. What is the maximum data transfer rate for this microprocessor? |
| A. | 8x10^6 bytes/sec |
| B. | 4x10^6 bytes/sec |
| C. | 16x10^6 bytes/sec |
| D. | 4x10^9 bytes/sec |
| Answer» C. 16x10^6 bytes/sec | |
| 700. |
The RST 7 instruction in 8085 microprocessor is equivalent to : |
| A. | CALL 0010 H |
| B. | CALL 0034 H |
| C. | CALL 0038 H |
| D. | CALL 003C H |
| Answer» D. CALL 003C H | |