MCQOPTIONS
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MCQOPTIONS
This section includes 18 Mcqs, each offering curated multiple-choice questions to sharpen your Embedded Systems knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
What are the three modules in the SPARC processor? |
| A. | IU, FPU, CU |
| B. | SP, DI, SI |
| C. | AX, BX, CX |
| D. | CU, CH, CL |
| Answer» B. SP, DI, SI | |
| 2. |
How many bits does SPARC-V9 processor have? |
| A. | 16 |
| B. | 32 |
| C. | 64 |
| D. | 128 |
| Answer» D. 128 | |
| 3. |
Where is trap vector table located in SPARC processor? |
| A. | program counter |
| B. | Y register |
| C. | status register |
| D. | trap base register |
| Answer» E. | |
| 4. |
What does SPARC stand for? |
| A. | scalable processor architecture |
| B. | speculating architecture |
| C. | speculating processor |
| D. | scaling Pentium architecture |
| Answer» B. speculating architecture | |
| 5. |
WHERE_IS_TRAP_VECTOR_TABLE_LOCATED_IN_SPARC_PROCESSOR??$ |
| A. | program counter |
| B. | Y register |
| C. | status register |
| D. | trap base register |
| Answer» E. | |
| 6. |
What are the three modules in the SPARC processor?$ |
| A. | IU, FPU, CU |
| B. | SP, DI, SI |
| C. | AX, BX, CX |
| D. | CU, CH, CL |
| Answer» B. SP, DI, SI | |
| 7. |
How many bits does SPARC-V9 processor have?$ |
| A. | 16 |
| B. | 32 |
| C. | 64 |
| D. | 128 |
| Answer» D. 128 | |
| 8. |
Which module of SPARC contains the general purpose registers? |
| A. | IU |
| B. | FPU |
| C. | CU |
| D. | control unit |
| Answer» B. FPU | |
| 9. |
How many floating point register does the FPU of the SPARC have? |
| A. | 16 128-bit |
| B. | 32 128-bit |
| C. | 64 128-bit |
| D. | 10 128-bit |
| Answer» B. 32 128-bit | |
| 10. |
When an external interrupt is generated, what type of mode does the processor supports? |
| A. | real mode |
| B. | virtual mode |
| C. | protected mode |
| D. | supervisor mode |
| Answer» E. | |
| 11. |
What is generated by an external interrupt in SPARC? |
| A. | internal trap |
| B. | external trap |
| C. | memory trap |
| D. | interfaced trap |
| Answer» B. external trap | |
| 12. |
How many instructions does SPARC processor have? |
| A. | 16 |
| B. | 32 |
| C. | 64 |
| D. | 128 |
| Answer» D. 128 | |
| 13. |
Which level is an in-built nonmaskable interrupt in SPARC processor? |
| A. | 15 |
| B. | 14 |
| C. | 13 |
| D. | 12 |
| Answer» B. 14 | |
| 14. |
How many external interrupts does SPARC processor support? |
| A. | 5 |
| B. | 10 |
| C. | 15 |
| D. | 20 |
| Answer» D. 20 | |
| 15. |
What improves the context switching and parameter passing? |
| A. | register windowing |
| B. | large register |
| C. | stack register |
| D. | program counter |
| Answer» B. large register | |
| 16. |
Which company developed SPARC? |
| A. | intel |
| B. | IBM |
| C. | Motorola |
| D. | sun microsystem |
| Answer» E. | |
| 17. |
How many bits does SPARC have? |
| A. | 8 |
| B. | 16 |
| C. | 32 |
| D. | 64 |
| Answer» D. 64 | |
| 18. |
What is the full form of SPARC in Sun Sparc Risc Model? |
| A. | scalable processor architecture |
| B. | speculating architecture |
| C. | speculating processor |
| D. | scaling Pentium architecture |
| Answer» B. speculating architecture | |