MCQOPTIONS
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MCQOPTIONS
This section includes 16 Mcqs, each offering curated multiple-choice questions to sharpen your Embedded Systems knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
What is done in mode1 of Z80? |
| A. | Interrupt vector is supplied via the external bus |
| B. | Interrupt vector is supplied via the peripherals |
| C. | NMI gets started |
| D. | Interrupt gets acknowledge from peripheral |
| Answer» B. Interrupt vector is supplied via the peripherals | |
| 2. |
Which signal is used to differentiates the access from a normal memory cycle? |
| A. | HALT |
| B. | RESET |
| C. | MREQ |
| D. | IORQ |
| Answer» E. | |
| 3. |
Which of the following can be a paired set of 16-bit register? |
| A. | CD |
| B. | HL |
| C. | AB |
| D. | EH |
| Answer» C. AB | |
| 4. |
WHICH_OF_THE_FOLLOWING_CAN_BE_A_PAIRED_SET_OF_16-BIT_REGISTER??$ |
| A. | CD |
| B. | HL |
| C. | AB |
| D. | EH |
| Answer» C. AB | |
| 5. |
What is done in mode1 of Z80?$ |
| A. | Interrupt vector is supplied via the external bus |
| B. | Interrupt vector is supplied via the peripherals |
| C. | NMI gets started |
| D. | Interrupt gets acknowledge from peripheral |
| Answer» B. Interrupt vector is supplied via the peripherals | |
| 6. |
Which signal is used to differentiates the access from a normal memory cycle?$ |
| A. | HALT |
| B. | RESET |
| C. | MREQ |
| D. | IORQ |
| Answer» E. | |
| 7. |
What does m1 signal in Z80 describes? |
| A. | I/O operation status |
| B. | Memory refresh output |
| C. | Output pulse on instruction fetch cycle |
| D. | Interrupt request input |
| Answer» D. Interrupt request input | |
| 8. |
By which instruction does the switching of registers take place? |
| A. | Instruction opcodes |
| B. | AXX instruction |
| C. | EXX instruction |
| D. | Register instruction |
| Answer» D. Register instruction | |
| 9. |
Which are the two additional registers of Z80? |
| A. | Interrupt and NMI |
| B. | NMI and PSW |
| C. | Interrupt vector and memory refresh |
| D. | NMI and memory refresh |
| Answer» D. NMI and memory refresh | |
| 10. |
What is the clock frequency of Z80? |
| A. | 6 MHz |
| B. | 8 MHz |
| C. | 4 MHz |
| D. | 2 MHz |
| Answer» D. 2 MHz | |
| 11. |
What is the purpose of memory refresh register of Z80? |
| A. | To control on-chip DRAM |
| B. | To control on-chip SRAM |
| C. | To control ROM |
| D. | To clear cache |
| Answer» B. To control on-chip SRAM | |
| 12. |
How an alternate set of the register can be identified in Z80? |
| A. | ‘Suffix |
| B. | ‘Prefix |
| C. | ,suffix |
| D. | ,prefix |
| Answer» B. ‚Äö√Ñ√∂‚àö√ë‚àö‚â§Prefix | |
| 13. |
What are the two register sets used in Z80? |
| A. | C’D’ and BC’ |
| B. | CD and BD |
| C. | IV and MR |
| D. | Main and alternate |
| Answer» E. | |
| 14. |
Flag register of Z80 is also known as |
| A. | Program status register |
| B. | Program status address |
| C. | Program status word |
| D. | Program address register |
| Answer» D. Program address register | |
| 15. |
Z80 is mainly based on |
| A. | Intel 8080 |
| B. | MIPS |
| C. | TIMS |
| D. | 8051 |
| Answer» B. MIPS | |
| 16. |
Which of the following microprocessor is designed by Zilog? |
| A. | Z80 |
| B. | Zigbee |
| C. | 80386 |
| D. | 8087 |
| Answer» B. Zigbee | |