MCQOPTIONS
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MCQOPTIONS
This section includes 13 Mcqs, each offering curated multiple-choice questions to sharpen your Embedded Systems knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
What happens when a task attempts to access memory outside its own address space? |
| A. | paging fault |
| B. | segmentation fault |
| C. | wait |
| D. | remains unchanged |
| Answer» C. wait | |
| 2. |
Which of the following is used to start a supervisor level? |
| A. | error signal |
| B. | default signal |
| C. | wait for the signal |
| D. | interrupt signal |
| Answer» B. default signal | |
| 3. |
WHICH_OF_THE_FOLLOWING_IS_USED_TO_START_A_SUPERVISOR_LEVEL??$ |
| A. | error signal |
| B. | default signal |
| C. | wait for the signal |
| D. | interrupt signal |
| Answer» B. default signal | |
| 4. |
What happens when a task attempts to access memory outside its own address space?$ |
| A. | paging fault |
| B. | segmentation fault |
| C. | wait |
| D. | remains unchanged |
| Answer» C. wait | |
| 5. |
How does the memory management unit provide the protection? |
| A. | disables the address translation |
| B. | enables the address translation |
| C. | wait for the address translation |
| D. | remains unchanged |
| Answer» B. enables the address translation | |
| 6. |
Which of the following can reduce the chip size? |
| A. | memory management unit |
| B. | execution unit |
| C. | memory protection unit |
| D. | bus interface unit |
| Answer» D. bus interface unit | |
| 7. |
Which of the following includes a tripped down memory management unit? |
| A. | memory protection unit |
| B. | memory real mode |
| C. | memory management unit |
| D. | bus interface unit |
| Answer» B. memory real mode | |
| 8. |
Which of the following unit provides security to the processor? |
| A. | bus interface unit |
| B. | execution unit |
| C. | peripheral unit |
| D. | memory protection unit |
| Answer» E. | |
| 9. |
Which of the following bits are used to control the cache behaviour? |
| A. | cacheable bit |
| B. | buffer bit |
| C. | cacheable bit and buffer bit |
| D. | cacheable bit, buffer bit and permission access bit |
| Answer» D. cacheable bit, buffer bit and permission access bit | |
| 10. |
What type of bit in the ARM memory mimics to that of the protection unit of ARM management unit? |
| A. | permission bit |
| B. | buffer bit |
| C. | cacheable bit |
| D. | access permission bit |
| Answer» B. buffer bit | |
| 11. |
Which of the following uses a priority level for permitting data? |
| A. | ARM memory management unit |
| B. | ARM protection memory management unit |
| C. | Bus interface unit |
| D. | Execution unit |
| Answer» C. Bus interface unit | |
| 12. |
How many bits does the memory region in the ARM memory protection unit have? |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» D. 4 | |
| 13. |
How many regions are created by the memory range in the ARM architecture? |
| A. | 4 |
| B. | 8 |
| C. | 16 |
| D. | 32 |
| Answer» C. 16 | |