MCQOPTIONS
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MCQOPTIONS
This section includes 15 Mcqs, each offering curated multiple-choice questions to sharpen your Microprocessors knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
THE_DEVICE_THAT_INTERFACES_AND_CONTROL_THE_INTERNAL_DATA_BUS_WITH_THE_SYSTEM_BUS_IS?$ |
| A. | data interface |
| B. | controller interface |
| C. | data and control interface |
| D. | data transreceiver |
| Answer» E. | |
| 2. |
Which of the following is not an interrupt generated by 80286?$ |
| A. | software interrupts |
| B. | hardware or external interrupts |
| C. | INT instruction |
| D. | none of the mentioned |
| Answer» E. | |
| 3. |
The register bank of Execution Unit of 80286 is used as$ |
| A. | for storing data |
| B. | scratch pad |
| C. | special purpose registers |
| D. | all of the mentioned |
| Answer» E. | |
| 4. |
The interrupt that has the lowest priority among the following is |
| A. | Processor extension segment overrun |
| B. | INTR |
| C. | INT instruction |
| D. | NMI |
| Answer» D. NMI | |
| 5. |
The interrupt that has the highest priority among the following is |
| A. | Single step |
| B. | NMI (non-maskable interrupt) |
| C. | INTR |
| D. | Instruction exception |
| Answer» E. | |
| 6. |
The instruction that comes into action, if the trap flag is set is |
| A. | maskable interrupt |
| B. | non-maskable interrupt |
| C. | single step interrupt |
| D. | breakpoint interrupt |
| Answer» D. breakpoint interrupt | |
| 7. |
For which of the following instruction does the return address point to instruction causing an exception? |
| A. | divide error exception |
| B. | bound range exceeded exception |
| C. | invalid opcode exception |
| D. | all of the mentioned |
| Answer» E. | |
| 8. |
The CPU must flush out the prefetched instructions immediately following the branch instruction i? |
| A. | conditional branch |
| B. | unconditional branch |
| C. | conditional and unconditional branches |
| D. | none of the mentioned |
| Answer» C. conditional and unconditional branches | |
| 9. |
The process of fetching the instructions in advance, and storing in the queue is called |
| A. | mapping |
| B. | swapping |
| C. | instruction pipelining |
| D. | storing |
| Answer» D. storing | |
| 10. |
The unit that is responsible for calculating the address of instructions, and data that the CPU wants to access is |
| A. | bus unit |
| B. | address unit |
| C. | instruction unit |
| D. | control unit |
| Answer» C. instruction unit | |
| 11. |
Which of the block is not considered as a block of an architecture of 80286? |
| A. | address unit |
| B. | bus unit |
| C. | instruction unit |
| D. | control unit |
| Answer» E. | |
| 12. |
The additional field that is available in 80286 is |
| A. | I/O Privilege field |
| B. | nested task flag |
| C. | protection enable |
| D. | all of the mentioned |
| Answer» E. | |
| 13. |
The flags that are used for controlling machine operation are called |
| A. | status flags |
| B. | control flags |
| C. | machine controlled flags |
| D. | all of the mentioned |
| Answer» C. machine controlled flags | |
| 14. |
The bits that are modified according to the result of the execution of logical and arithmetic instructions are called |
| A. | byte addressable bit |
| B. | control flag bits |
| C. | status flag bit |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 15. |
The CPU of 80286 contains |
| A. | 16-bit general purpose registers |
| B. | 16-bit segment registers |
| C. | status and control register |
| D. | all of the mentioned |
| Answer» E. | |