MCQOPTIONS
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MCQOPTIONS
This section includes 22 Mcqs, each offering curated multiple-choice questions to sharpen your Microprocessors knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
Addressing mode in which the address field of instruction specifies a register in the CPU, whose contents given the address of the operand in memory is called...... |
| A. | indirect addressing mode |
| B. | relative addressing mode |
| C. | register addressing mode |
| D. | register indirect addressing mode |
| Answer» E. | |
| 2. |
In which addressing mode, the operand is given explicitly in the instruction (Example instruction : ADD R4, #3) |
| A. | Absolute mode |
| B. | Register indirect mode. |
| C. | Immediate mode |
| D. | Based Indexed mode. |
| Answer» D. Based Indexed mode. | |
| 3. |
In the Register Indirect addressing mode, the effective address of the datum in the base register or an index register that is specified by the instruction is |
| A. | \(EA = \left\{ {\begin{array}{*{20}{c}} {\left( {AX} \right)}\\ {\left( {DI} \right)}\\ {\left( {SI} \right)} \end{array}} \right\}\) |
| B. | \(EA = \left\{ {\begin{array}{*{20}{c}} {\left( {BX} \right)}\\ {\left( {DI} \right)}\\ {\left( {SI} \right)} \end{array}} \right\}\) |
| C. | \(EA = \left\{ {\begin{array}{*{20}{c}} {\left( {CX} \right)}\\ {\left( {DI} \right)}\\ {\left( {SI} \right)} \end{array}} \right\}\) |
| D. | \(EA = \left\{ {\begin{array}{*{20}{c}} {\left( {DX} \right)}\\ {\left( {DI} \right)}\\ {\left( {SI} \right)} \end{array}} \right\}\) |
| Answer» C. \(EA = \left\{ {\begin{array}{*{20}{c}} {\left( {CX} \right)}\\ {\left( {DI} \right)}\\ {\left( {SI} \right)} \end{array}} \right\}\) | |
| 4. |
An addressing mode in which the location of the data is contained within the mnemonic, is known as |
| A. | Immediate addressing mode |
| B. | Implied addressing mode |
| C. | Register addressing mode |
| D. | Direct addressing mode |
| Answer» C. Register addressing mode | |
| 5. |
Consider an instruction of the type LW R1, 20(R2) which during execution reads a 32 bit word from memory and stores it in a 32 bit register R1. The effective address of the memory location is obtained by adding a constant 20 and contents of R2. Which one best reflects the source operand |
| A. | Immediate addressing |
| B. | Register addressing |
| C. | Register Indirect addressing |
| D. | Indexed addressing |
| Answer» E. | |
| 6. |
In the following addressing mode, which of them performs better for accessing array? |
| A. | Register addressing mode |
| B. | Direct addressing mode |
| C. | Displacement addressing mode |
| D. | Index addressing mode |
| Answer» E. | |
| 7. |
In the 8051 microcontrollers, the direct addressing mode is used in |
| A. | Internal data memory |
| B. | External data memory |
| C. | Internal program memory |
| D. | External program memory |
| Answer» B. External data memory | |
| 8. |
In case the code is position-dependent, the most suitable addressing mode is: |
| A. | Direct mode |
| B. | Indirect mode |
| C. | Relative mode |
| D. | Indexed mode |
| Answer» D. Indexed mode | |
| 9. |
For computers based on three-address instruction formats, each address field can be used to specify which of the following:(S1) A memory operand(S2) A processor register(S3) An implied accumulator register |
| A. | Either S1 or S2 |
| B. | Either S2 or S3 |
| C. | Only S2 and S3 |
| D. | All of S1, S2 and S3 |
| Answer» B. Either S2 or S3 | |
| 10. |
In which addressing mode the contents of a register specified in the instruction are first decremented, and these contents are used as the effective address of the operands? |
| A. | index addressing |
| B. | indirect addressing |
| C. | auto increment |
| D. | auto decrement |
| Answer» E. | |
| 11. |
IN_WHICH_OF_THESE_ADDRESSING_MODES,_A_CONSTANT_IS_SPECIFIED_IN_THE_INSTRUCTION,_AFTER_THE_OPCODE_BYTE??$ |
| A. | register instructions |
| B. | register specific instructions |
| C. | direct addressing |
| D. | immediate mode |
| Answer» E. | |
| 12. |
The data address of look-up table is found by adding the contents of$ |
| A. | accumulator with that of program counter |
| B. | accumulator with that of program counter or data pointer |
| C. | data register with that of program counter or accumulator |
| D. | data register with that of program counter or data pointer |
| Answer» C. data register with that of program counter or accumulator | |
| 13. |
The only memory which can be accessed using indexed addressing mode is$ |
| A. | RAM |
| B. | ROM |
| C. | Main memory |
| D. | Program memory |
| Answer» E. | |
| 14. |
The instruction, ADD A, #100 perform? |
| A. | 100(decimal) is added to contents of address register |
| B. | 100(decimal) is subtracted from the accumulator |
| C. | 100(decimal) is added to contents of an accumulator |
| D. | none |
| Answer» D. none | |
| 15. |
The instruction, RLA perform? |
| A. | rotation of address register to left |
| B. | rotation of accumulator to left |
| C. | rotation of address register to right |
| D. | rotation of accumulator to right |
| Answer» C. rotation of address register to right | |
| 16. |
The addressing mode, in which the instructions has no source and destination operands is |
| A. | register instructions |
| B. | register specific instructions |
| C. | direct addressing |
| D. | indirect addressing |
| Answer» C. direct addressing | |
| 17. |
The instruction, ADD A, R7 is an example of |
| A. | register instructions |
| B. | register specific instructions |
| C. | indexed addressing |
| D. | none |
| Answer» B. register specific instructions | |
| 18. |
The address register for storing the 8-bit addresses can be |
| A. | R0 of the selected bank of register |
| B. | R1 of the selected bank of register |
| C. | Stack pointer |
| D. | All of the mentioned |
| Answer» E. | |
| 19. |
The address register for storing the 16-bit addresses can only be |
| A. | stack pointer |
| B. | data pointer |
| C. | instruction register |
| D. | accumulator |
| Answer» C. instruction register | |
| 20. |
The storage of addresses that can be directly accessed is |
| A. | external data RAM |
| B. | internal data ROM |
| C. | internal data RAM and SFRS |
| D. | external data ROM and SFRS |
| Answer» D. external data ROM and SFRS | |
| 21. |
The symbol, ‘addr 16’ represents the 16-bit address which is used by the instructions to specify the$ |
| A. | destination address of CALL |
| B. | source address of JUMP |
| C. | destination address of call or jump |
| D. | source address of call or jump |
| Answer» D. source address of call or jump | |
| 22. |
Which of the following is not an addressing mode of 8051? |
| A. | register instructions |
| B. | register specific instructions |
| C. | indexed addressing |
| D. | none |
| Answer» E. | |