MCQOPTIONS
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This section includes 3 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
When a clock signal is gated with another signal like load signal, output is not affected. |
| A. | true |
| B. | false |
| Answer» C. | |
| 2. |
Automatic test pattern generators depend on |
| A. | map design |
| B. | layout design |
| C. | logic domain |
| D. | testing domain |
| Answer» D. testing domain | |
| 3. |
_______ is used to start the initial sequence correctly. |
| A. | preset |
| B. | clear |
| C. | preset and clear |
| D. | clock |
| Answer» D. clock | |