MCQOPTIONS
Saved Bookmarks
MCQOPTIONS
This section includes 9294 Mcqs, each offering curated multiple-choice questions to sharpen your Engineering knowledge and support exam preparation. Choose a topic below to get started.
| 3751. |
In 8355, the ROM is organized as __________ words of 8 bits each. |
| A. | 2000 |
| B. | 2048 |
| C. | 8355 |
| D. | 835 |
| Answer» C. 8355 | |
| 3752. |
Choose the appropriate turn on and turn off time of a FET |
| A. | 1 ns, 10ns |
| B. | 6 ns, 18ns |
| C. | 4 ns, 8 ns |
| D. | 10 ns, 10 ns |
| Answer» C. 4 ns, 8 ns | |
| 3753. |
Consider the following statements ECL has least propagation delayTTL has largest fan outCMOS has highest noise marginTTL has lowest power dissipation Which of these are correct? |
| A. | 1 and 3 |
| B. | 2 and 4 |
| C. | 3 and 4 |
| D. | 1 and 2 |
| Answer» B. 2 and 4 | |
| 3754. |
In Schottky TTL, a Schottky diode is used for |
| A. | forming the gate |
| B. | connecting the resistor |
| C. | clamping of the basic collector junction |
| D. | none of the above |
| Answer» D. none of the above | |
| 3755. |
The circuit of the given figure is |
| A. | full adder |
| B. | magnitude comparator |
| C. | parity detector |
| D. | none of the above |
| Answer» D. none of the above | |
| 3756. |
Which of the following ICs has only one NAND gate? |
| A. | 7410 |
| B. | 7420 |
| C. | 7430 |
| D. | 7447 |
| Answer» D. 7447 | |
| 3757. |
A mod-10 counter can divide the clock frequency by a factor of |
| A. | 10 |
| B. | 20 |
| C. | 210 |
| D. | 102 |
| Answer» B. 20 | |
| 3758. |
In a RS flip-flop no change occurs during |
| A. | prohibited mode |
| B. | set mode |
| C. | reset mode |
| D. | disable mode |
| Answer» E. | |
| 3759. |
In a digital circuit, a clock is a |
| A. | crystal type |
| B. | multivibrator |
| C. | flip-flop |
| D. | free running multivibrator |
| Answer» E. | |
| 3760. |
Out of multiplexer and demultiplexer, which can be used as a logic function generator? |
| A. | Multiplexer only |
| B. | Demultiplexer only |
| C. | Both |
| D. | None |
| Answer» B. Demultiplexer only | |
| 3761. |
A two-input OR gate is designed for positive logic. However, it is operated with negative logic. The resulting logic operation will then be |
| A. | OR |
| B. | AND |
| C. | NOR |
| D. | EX-OR |
| Answer» B. AND | |
| 3762. |
A clock signal driving a 6-bit ring counter has a frequency of 1 MHz. How long is each timing bit high? |
| A. | 1 ms |
| B. | 2 ms |
| C. | 3 ms |
| D. | 6 ms |
| Answer» B. 2 ms | |
| 3763. |
Assertion (A): In a serial in-serial out shift register, access is available only to the left most or right most flip flops Reason (R): If the output of a shift register is feedback to serial input it can be used as a ring counter. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» C. A is true, R is false | |
| 3764. |
IC counters are |
| A. | synchronous only |
| B. | asynchronous only |
| C. | both synchronous and asynchronous |
| D. | none of the above |
| Answer» D. none of the above | |
| 3765. |
The method used to transfer data from I/O units to memory by suspending the memory-CPU data transfer for one memory cycle is called |
| A. | I/O spooling |
| B. | Cycle stealing |
| C. | Line conditioning |
| D. | Demand paging |
| Answer» C. Line conditioning | |
| 3766. |
Out of SAM and RAM |
| A. | access time in both does not depend on address location |
| B. | in SAM access time depends on address location but not in RAM |
| C. | in RAM access time depends on address location but not in SAM |
| D. | in both the access time depends on storage location |
| Answer» C. in RAM access time depends on address location but not in SAM | |
| 3767. |
Which of the following correctly declares a pointer to an array of intergers in C? |
| A. | int * P [20] |
| B. | int * P |
| C. | int (* P) [20] |
| D. | int * (P [20]) |
| Answer» D. int * (P [20]) | |
| 3768. |
With 2's complement representation, the range of values that can be represented on the data bus of an 8 bit microprocessor is given by |
| A. | -128 to 127 |
| B. | -128 to +128 |
| C. | -127 to 128 |
| D. | -256 to 256 |
| Answer» B. -128 to +128 | |
| 3769. |
In a modem digital computer, a subtractor in normally not used because |
| A. | subtractors are very expensive |
| B. | the design of a subtractor is very complex |
| C. | the adder is geared for doing subtraction |
| D. | most of the programs do not require subtraction |
| Answer» D. most of the programs do not require subtraction | |
| 3770. |
In which one of the following types of analog to digital convertors the conversion time is practically independent of the amplitude of the analog signal? |
| A. | The dual slope integrating type |
| B. | Successive approximation type |
| C. | Counter ramp type |
| D. | Tracking type |
| Answer» C. Counter ramp type | |
| 3771. |
In 8085 microprocessor, which of the following is not vectored interrupt? |
| A. | RST 5.5 |
| B. | RST 6.5 |
| C. | RST 7.5 |
| D. | INTR |
| Answer» E. | |
| 3772. |
NAND gates can be used to produce edge triggering. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 3773. |
In a programmable counter |
| A. | the starting number for counting can be programmed |
| B. | the modulus can be programmed |
| C. | both the starting number and modulus can be programmed |
| D. | either the starting number or modulus can be programmed |
| Answer» C. both the starting number and modulus can be programmed | |
| 3774. |
Binary 1000 will be the result of which of the following? |
| A. | Binary 1000 - 100 |
| B. | Binary 1011 - 1111 |
| C. | Binary 1111 - 111 |
| D. | Binary 11111 - 1111 |
| Answer» D. Binary 11111 - 1111 | |
| 3775. |
The number of comparator circuits required to build a three-bit simultaneous A/D converter is |
| A. | 7 |
| B. | 8 |
| C. | 15 |
| D. | 16 |
| Answer» B. 8 | |
| 3776. |
-8 is equal to signed binary number |
| A. | 10001000 |
| B. | 00001000 |
| C. | 10000000 |
| D. | 11000000 |
| Answer» B. 00001000 | |
| 3777. |
Assume that only x and y logic inputs are available. What is the minimum number of 2-input NAND gates required to implement x y? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» D. 5 | |
| 3778. |
Consider the following twoStatements 1: stable multivibrator can be used for generating square wave.Statements 2 : stable multivibrator can be used for storing binary information. |
| A. | only statement 1 is correct |
| B. | only statement 2 is correct |
| C. | both statements are correct |
| D. | both the statements 1 and 2 are not correct |
| Answer» D. both the statements 1 and 2 are not correct | |
| 3779. |
Bit is |
| A. | smallest piece of electronic hardware |
| B. | a drilling tool |
| C. | an abbreviation for binary digit |
| D. | the smallest number |
| Answer» D. the smallest number | |
| 3780. |
A 12 bit ADC is operating with 1 s clock period. Total conversion time is 14 s. ADC is |
| A. | flash type |
| B. | counting type |
| C. | integrating type |
| D. | successive approximation type |
| Answer» D. successive approximation type | |
| 3781. |
In 8086 microprocessor, if the segment register contains 1 FAB and IP register contains 10AI, the effective memory address is |
| A. | 20B51 |
| B. | 304C |
| C. | FBC0 |
| D. | FDB5 |
| Answer» B. 304C | |
| 3782. |
Which of the following flip flops cannot be converted to D flip flop? |
| A. | JK |
| B. | SR |
| C. | Master slave |
| D. | None of the above |
| Answer» E. | |
| 3783. |
D/A converters are generally |
| A. | weighted resistor network |
| B. | binary ladder network |
| C. | either (a) or (b) |
| D. | neither (a) nor (b) |
| Answer» C. either (a) or (b) | |
| 3784. |
Is the interrupt-enable flag? |
| A. | Low |
| B. | High |
| C. | Never |
| D. | None |
| Answer» C. Never | |
| 3785. |
A 7477 decoder drives |
| A. | seven-segment display |
| B. | nickel tape |
| C. | relays |
| D. | diode matrix |
| Answer» B. nickel tape | |
| 3786. |
BCD numbers are useful whenever |
| A. | binary to hexadecimal conversion is desired |
| B. | binary to BCD conversion is desired |
| C. | decimal information is transferred into or out of a digital system |
| D. | none of the above |
| Answer» D. none of the above | |
| 3787. |
The ASCII code is for information interchange by a binary code for |
| A. | alphabet only |
| B. | number only |
| C. | alpha-numeric and other common symbols |
| D. | none of these |
| Answer» D. none of these | |
| 3788. |
While __________ is the fastest unsaturated logic gate __________ has the excellent noise immunity? |
| A. | ECL, TTL |
| B. | TTL, ECL |
| C. | ECL, RTL |
| D. | RTL, DTL |
| Answer» D. RTL, DTL | |
| 3789. |
In a 4 bit D/A converter, the offset error is the output voltage when input digital voltage is |
| A. | 1111 |
| B. | 0000 |
| C. | either 1111 or 0000 |
| D. | none of the above |
| Answer» C. either 1111 or 0000 | |
| 3790. |
To convert SR latch to D latch |
| A. | connect both S and R to D |
| B. | connect D to S directly and D to R through inverter |
| C. | connect D to R directly and D to S through inverter |
| D. | connect S to D and leave R open |
| Answer» C. connect D to R directly and D to S through inverter | |
| 3791. |
If a RAM has 34 bits in its MAR and 16 bits its MAR, then its capacity will be |
| A. | 32 GB |
| B. | 16 GB |
| C. | 32 MB |
| D. | 16 MB |
| Answer» D. 16 MB | |
| 3792. |
The output voltage of 5-bit D/A binary ladder that has a digital input of 11010 (Assuming 0 = 0 V and 1 = + 10 V) is |
| A. | 3.4375 V |
| B. | 6.0 V |
| C. | 8.125 V |
| D. | 8.6875 V |
| Answer» D. 8.6875 V | |
| 3793. |
The initial contents of the 4 bit serial in parallel out right shift, shift register shown in figure is 0110. After three clock pulses are applied, the contents of the shift register will be |
| A. | 0000 |
| B. | 0101 |
| C. | 1010 |
| D. | 1111 |
| Answer» D. 1111 | |
| 3794. |
In standard TTL the totem pole stage refers to |
| A. | multiemitter input stage |
| B. | phase splitter |
| C. | output buffer |
| D. | open collector output stage |
| Answer» D. open collector output stage | |
| 3795. |
A 1 ms pulse can be converted into a 10 ms pulse by using which one of the following |
| A. | An astable multivibrator |
| B. | Stable multivibrator |
| C. | A bistable multivibrator |
| D. | A J-K flip-flop |
| Answer» C. A bistable multivibrator | |
| 3796. |
In 8085 microprocessor the value of the most significant bit of the result following the execution of any arithmetic or Boolean instruction is stored in |
| A. | the carry status flag |
| B. | the auxiliary carry status flag |
| C. | sign status flag |
| D. | zero status flag |
| Answer» D. zero status flag | |
| 3797. |
In the DRAM cell in the figure is the Vt of the NMOSFET is 1 V. For the following three combinations of WL and BL voltages. |
| A. | 5 V, 3 V, 7 V |
| B. | 4 V, 3 V, 4 V |
| C. | 5 V, 5 V, 5 V |
| D. | 4 V, 4 V, 4 V |
| Answer» D. 4 V, 4 V, 4 V | |
| 3798. |
The factors which govern fan out of CMOS gates are |
| A. | maximum permissible propagation delay |
| B. | input capacitance of each load |
| C. | both (a) and (b) |
| D. | neither (a) nor (b) |
| Answer» D. neither (a) nor (b) | |
| 3799. |
Which of the following subtraction operations do not result in F16? (BA)16 - (AB)16 (BC)16 - (CB)16(CB)16 - (BC)16(CB)16 - (BC)16 Select the correct answer |
| A. | 1 and 2 |
| B. | 1 and 3 |
| C. | 2 and 3 |
| D. | 1, 2 and 3 |
| Answer» B. 1 and 3 | |
| 3800. |
The 2's complement representation of the decimal number -4 is |
| A. | 0100 |
| B. | 1100 |
| C. | 1011 |
| D. | 1010 |
| Answer» C. 1011 | |