MCQOPTIONS
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MCQOPTIONS
This section includes 10 Mcqs, each offering curated multiple-choice questions to sharpen your Microprocessors knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
THE_PIN_THAT_IS_USED_TO_WRITE_DATA_TO_THE_ADDRESSED_MEMORY_LOCATION,_DURING_DMA_WRITE_OPERATION_IS?$ |
| A. | MEMR (active low) |
| B. | AEN |
| C. | MEMW (active low) |
| D. | IOW (active low) |
| Answer» D. IOW (active low) | |
| 2. |
The_pin_that_strobes_the_higher_byte_of_the_memory_address,_generated_by_the_DMA_controller_into_the_latches_is$ |
| A. | AEN |
| B. | ADSTB |
| C. | TC |
| D. | None of the mentioned |
| Answer» C. TC | |
| 3. |
The pin that requests the access of the system bus i? |
| A. | HLDA |
| B. | HRQ |
| C. | ADSTB |
| D. | None of the mentioned |
| Answer» C. ADSTB | |
| 4. |
The pin that disables all the DMA channels by clearing the mode registers is |
| A. | MARK |
| B. | CLEAR |
| C. | RESET |
| D. | READY |
| Answer» D. READY | |
| 5. |
The IOW (active low) in its slave mode loads the contents of a data bus to |
| A. | 8-bit mode register |
| B. | upper/lower byte of 16-bit DMA address register |
| C. | terminal count register |
| D. | all of the mentioned |
| Answer» E. | |
| 6. |
The IOR (active low) input line acts as output in |
| A. | slave mode |
| B. | master mode |
| C. | master and slave mode |
| D. | none of the mentioned |
| Answer» C. master and slave mode | |
| 7. |
In 8257 register format, the selected channel is disabled after the terminal count condition is reached when |
| A. | Auto load is set |
| B. | Auto load is reset |
| C. | TC STOP bit is reset |
| D. | TC STOP bit is set |
| Answer» E. | |
| 8. |
The common register(s) for all the four channels of 8257 is |
| A. | DMA address register |
| B. | Terminal count register |
| C. | Mode set register and status register |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 9. |
In 8257 (DMA), each of the four channels has |
| A. | a pair of two 8-bit registers |
| B. | a pair of two 16-bit registers |
| C. | one 16-bit register |
| D. | one 8-bit register |
| Answer» C. one 16-bit register | |
| 10. |
In direct memory access mode, the data transfer takes place |
| A. | directly |
| B. | indirectly |
| C. | directly and indirectly |
| D. | none of the mentioned |
| Answer» B. indirectly | |