2291 + Mcqs in Digital Electronics Page 26 McqOptions

1251.	Floppy disks are organized into concentric rings called ________.
A.	tracks
B.	arrays
C.	sectors
D.	cells
Answer» B. arrays

Discussion

1252.	A typical RAM will read (place stored data on its outputs) whenever the Chip Select line is active and the Write Enable line is inactive.
A.	True
B.	False
Answer» B. False

Discussion

1253.	The TMS44100 4M 1 DRAM does not have a chip select (SC) input.
A.	True
B.	False
Answer» B. False

Discussion

1254.	The number of 16k 4 memories needed to construct a 128k 8 memory is ________.
A.	4
B.	8
C.	12
D.	16
Answer» E.

Discussion

1255.	The minimum number of address lines needed for a 64K memory is ________.
A.	10
B.	12
C.	14
D.	16
Answer» E.

Discussion

1256.	EEPROM and Flash memory are electrically erasable.
A.	True
B.	False
Answer» B. False

Discussion

1257.	A CD-ROM is a form of read-only memory in which data are stored as ________.
A.	magnetic "bubbles"
B.	magnetized spots
C.	"pits" on an optical disk
D.	tiny "pinholes" in an opaque substance
Answer» D. tiny "pinholes" in an opaque substance

Discussion

1258.	A type of read/write memory available with MOS technology is ________.
A.	SRAM
B.	DRAM
C.	both of the above
D.	none of the above
Answer» D. none of the above

Discussion

1259.	Because 4096 = 212, a 4K 1 RAM requires ________ address bits to access all locations.
A.	4096
B.	10
C.	12
D.	1024
Answer» D. 1024

Discussion

1260.	To reduce the number of pins on high-capacity DRAM chips, address ________ is used so that a single pin can accommodate two different address bits.
A.	conversion
B.	programming
C.	multiplexing
D.	firmware
Answer» D. firmware

Discussion

1261.	The highest-speed magnetic storage is achieved by using a floppy disk.
A.	True
B.	False
Answer» C.

Discussion

1262.	A type of memory that is accessed serially (one location after the other) is a ________.
A.	ROM
B.	read/write memory
C.	shift register
D.	PLD
Answer» D. PLD

Discussion

1263.	The basic purpose of tristate or open-collector outputs on a memory is to ________.
A.	isolate devices connected to a common bus
B.	simplify the circuitry
C.	provide faster transitions of the output
D.	increase the output current
Answer» B. simplify the circuitry

Discussion

1264.	The checksum method is used to test ________.
A.	ROM
B.	EEPROM
C.	FPLA
D.	RAM
Answer» B. EEPROM

Discussion

1265.	The floating-gate MOSFET is the actual storage element for EEPROMs. An electron charge will remain on the floating gate for more than 10 years unless drained off electrically.
A.	True
B.	False
Answer» B. False

Discussion

1266.	ROMs are used to store data on a permanent basis.
A.	True
B.	False
Answer» B. False

Discussion

1267.	If a memory design allows a storage location to be accessed without first sequencing through other locations, it is called Random Access Memory.
A.	True
B.	False
Answer» B. False

Discussion

1268.	The time delay called access time, tac, is a measure of the ROM's operating speed.
A.	True
B.	False
Answer» C.

Discussion

1269.	An optical disk is an example of magnetic storage.
A.	True
B.	False
Answer» C.

Discussion

1270.	The periodic recharging of dynamic RAM memory cells is called ________.
A.	reinstalling
B.	revitalizing
C.	refreshing
D.	reinstating
Answer» D. reinstating

Discussion

1271.	A(n) ________ is user programmable and can also be erased electronically and reprogrammed as often as desired.
A.	PROM
B.	ROM
C.	EEPROM
D.	EPROM
Answer» D. EPROM

Discussion

1272.	A DIMM ________.
A.	is available in 30-pin or 72-pin packages
B.	has contact pins on only one side of the module
C.	has less memory than the newer SIMM modules
D.	has contact pins on both sides of the module for larger data paths
Answer» D. has contact pins on both sides of the module for larger data paths

Discussion

1273.	The time from the beginning of a read cycle to the point when the data output is valid is called propagation delay.
A.	True
B.	False
Answer» C.

Discussion

1274.	Due to their ability to be easily erased and reused, magnetic memory devices are widely used for RAM.
A.	True
B.	False
Answer» C.

Discussion

1275.	The major advantage of dynamic RAM over static RAM is ________.
A.	cost
B.	speed
C.	storage density
D.	cost and storage density
Answer» E.

Discussion

1276.	The address space of a RAM memory can be expanded using a decoder and additional memory ICs. The output of the decoder should be connected to which input line of the memory?
A.	The most significant address inputs
B.	The most significant data inputs
C.	The read/write line
D.	The chip enable
Answer» E.

Discussion

1277.	The memory operation that stores data into a memory location after entering a new address is called ________.
A.	a read cycle
B.	a write cycle
C.	a refresh cycle
D.	chip select
Answer» C. a refresh cycle

Discussion

1278.	All rows in a 2118 dynamic RAM need to be refreshed ________.
A.	every second
B.	every millisecond
C.	every 50 milliseconds
D.	every 2 milliseconds
Answer» E.

Discussion

1279.	In DRAM operations, it is assumed that R/W is in its ________ state during a ________ operation.
A.	HIGH, read
B.	Hi-Z, write
C.	HIGH, write
D.	Hi-Z, read
Answer» B. Hi-Z, write

Discussion

1280.	In HDL, the operation of the DEMUX is exactly described using a ________.
A.	function
B.	process
C.	variable type
D.	number of conditional signal assignment statements
Answer» E.

Discussion

1281.	The minimum input voltage recognized as HIGH by a TTL gate is ________.
A.	2.0 V
B.	2.4 V
C.	0.8 V
D.	5.0 V
Answer» B. 2.4 V

Discussion

1282.	In the keypad encoder, just after the 4 ms mark, the simulation initiates the release of the key by changing the column value to ________, which causes the d output to go into its Hi-Z state.
A.	0 hex
B.	4 hex
C.	8 hex
D.	F hex
Answer» E.

Discussion

1283.	Determine the output voltage Vout for the circuit in the given figure.
A.	0.5 V
B.	0 V
C.	+5 V
D.	+4.3 V
Answer» E.

Discussion

1284.	Assume a ROM to be tested is compared with a known good ROM. If the checksums differ, the ROM is ________.
A.	very likely to be good
B.	definitely good
C.	very likely to be bad
D.	definitely bad
Answer» E.

Discussion

1285.	The checkerboard pattern test is used to test ________.
A.	ROM
B.	EEPROM
C.	FPLA
D.	RAM
Answer» E.

Discussion

1286.	Information that is stored in an EEPROM ________.
A.	can be modified by performing a memory write operation
B.	is stored by the manufacturer and cannot be changed
C.	is lost if power is interrupted
D.	can be erased by applying high voltage to each storage location
Answer» E.

Discussion

1287.	The difference between RAM and ROM is that ________.
A.	RAM has a read/write signal and ROM doesn't
B.	RAM will lose data when the power is removed and ROM won't
C.	RAM has random address access and ROM uses sequential address access
D.	RAM has a read/write signal and ROM doesn't; RAM will lose data when the power is removed and ROM won't.
E.	All of the above
Answer» E. All of the above

Discussion

1288.	The TMS44100 has ________ address inputs.
A.	10
B.	11
C.	12
D.	13
Answer» C. 12

Discussion

1289.	Static memory will maintain storage even if power is removed.
A.	True
B.	False
Answer» C.

Discussion

1290.	Static RAMs (SRAMs) use internal capacitors as basic storage elements.
A.	True
B.	False
Answer» C.

Discussion

1291.	A burst refresh and a normal memory operation of a DRAM can be interspersed.
A.	True
B.	False
Answer» C.

Discussion

1292.	ROMs are used to store data that generally cannot be easily changed.
A.	True
B.	False
Answer» B. False

Discussion

1293.	RAM stands for Readily Accessible Memory.
A.	True
B.	False
Answer» C.

Discussion

1294.	A NOR gate is a universal gate.
A.	True
B.	False
Answer» B. False

Discussion

1295.	An exclusive-OR gate's output is HIGH when its inputs are equal.
A.	True
B.	False
Answer» C.

Discussion

1296.	A VHDL component is a predefined logic function.
A.	True
B.	False
Answer» C.

Discussion

1297.	A NOR gate's truth table is the opposite of that of an OR gate.
A.	True
B.	False
Answer» B. False

Discussion

1298.	Pulse-triggered or level-triggered devices are the same.
A.	True
B.	False
Answer» B. False

Discussion

1299.	A D flip-flop is constructed by connecting an inverter between the SET and clock terminals.
A.	True
B.	False
Answer» C.

Discussion

1300.	Some flip-flops have invalid states.
A.	True
B.	False
Answer» B. False

Discussion

Explore topic-wise MCQs in Engineering.

Floppy disks are organized into concentric rings called ________.

A typical RAM will read (place stored data on its outputs) whenever the Chip Select line is active and the Write Enable line is inactive.

The TMS44100 4M 1 DRAM does not have a chip select (SC) input.

The number of 16k 4 memories needed to construct a 128k 8 memory is ________.

The minimum number of address lines needed for a 64K memory is ________.

EEPROM and Flash memory are electrically erasable.

A CD-ROM is a form of read-only memory in which data are stored as ________.

A type of read/write memory available with MOS technology is ________.

Because 4096 = 212, a 4K 1 RAM requires ________ address bits to access all locations.

To reduce the number of pins on high-capacity DRAM chips, address ________ is used so that a single pin can accommodate two different address bits.

The highest-speed magnetic storage is achieved by using a floppy disk.

A type of memory that is accessed serially (one location after the other) is a ________.

The basic purpose of tristate or open-collector outputs on a memory is to ________.

The checksum method is used to test ________.

The floating-gate MOSFET is the actual storage element for EEPROMs. An electron charge will remain on the floating gate for more than 10 years unless drained off electrically.

ROMs are used to store data on a permanent basis.

If a memory design allows a storage location to be accessed without first sequencing through other locations, it is called Random Access Memory.

The time delay called access time, tac, is a measure of the ROM's operating speed.

An optical disk is an example of magnetic storage.

The periodic recharging of dynamic RAM memory cells is called ________.

A(n) ________ is user programmable and can also be erased electronically and reprogrammed as often as desired.

A DIMM ________.

The time from the beginning of a read cycle to the point when the data output is valid is called propagation delay.

Due to their ability to be easily erased and reused, magnetic memory devices are widely used for RAM.

The major advantage of dynamic RAM over static RAM is ________.

The address space of a RAM memory can be expanded using a decoder and additional memory ICs. The output of the decoder should be connected to which input line of the memory?

The memory operation that stores data into a memory location after entering a new address is called ________.

All rows in a 2118 dynamic RAM need to be refreshed ________.

In DRAM operations, it is assumed that R/W is in its ________ state during a ________ operation.

In HDL, the operation of the DEMUX is exactly described using a ________.

The minimum input voltage recognized as HIGH by a TTL gate is ________.

In the keypad encoder, just after the 4 ms mark, the simulation initiates the release of the key by changing the column value to ________, which causes the d output to go into its Hi-Z state.

Determine the output voltage Vout for the circuit in the given figure.

Assume a ROM to be tested is compared with a known good ROM. If the checksums differ, the ROM is ________.

The checkerboard pattern test is used to test ________.

Information that is stored in an EEPROM ________.

The difference between RAM and ROM is that ________.

The TMS44100 has ________ address inputs.

Static memory will maintain storage even if power is removed.

Static RAMs (SRAMs) use internal capacitors as basic storage elements.

A burst refresh and a normal memory operation of a DRAM can be interspersed.

ROMs are used to store data that generally cannot be easily changed.

RAM stands for Readily Accessible Memory.

A NOR gate is a universal gate.

An exclusive-OR gate's output is HIGH when its inputs are equal.

A VHDL component is a predefined logic function.

A NOR gate's truth table is the opposite of that of an OR gate.

Pulse-triggered or level-triggered devices are the same.

A D flip-flop is constructed by connecting an inverter between the SET and clock terminals.

Some flip-flops have invalid states.

In DRAM operations, it is assumed that R/W is in its state during a operation.