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MCQOPTIONS
This section includes 1271 Mcqs, each offering curated multiple-choice questions to sharpen your Electronics & Communication Engineering knowledge and support exam preparation. Choose a topic below to get started.
| 1101. |
A full subtractor has a total of |
| A. | 2 inputs |
| B. | 3 inputs |
| C. | 4 inputs |
| D. | 5 inputs |
| Answer» C. 4 inputs | |
| 1102. |
A 3 bit up-down counter can count from |
| A. | 000 to 111 |
| B. | 111 to 000 |
| C. | 000 to 111 and also from 111 to 000 |
| D. | none of the above |
| Answer» D. none of the above | |
| 1103. |
A full adder has two outputs SUM and CARRY. |
| A. | 1 |
| B. | |
| C. | Twice the input clock frequency |
| D. | Half the input clock frequency |
| Answer» B. | |
| 1104. |
(1001-10) is equal to |
| A. | 7 |
| B. | (8)8 |
| C. | (7)4 |
| D. | (8)4 |
| Answer» B. (8)8 | |
| 1105. |
How many interrupts are there in 8085 microprocessor? |
| A. | 4 |
| B. | 5 |
| C. | 6 |
| D. | 8 |
| Answer» C. 6 | |
| 1106. |
In a positive edge triggered D flip flop |
| A. | D input is called direct set |
| B. | Preset is called direct reset |
| C. | Present and clear are called direct set and reset respectively |
| D. | D input overrides other inputs |
| Answer» D. D input overrides other inputs | |
| 1107. |
The Boolean expression for the circuit of the given figure |
| A. | A {F + (B + C) (D + E)} |
| B. | A [F + (B + C) (DE)] |
| C. | A + F + (B + C) (D + E)] |
| D. | A [F + (BC) (DE)] |
| Answer» B. A [F + (B + C) (DE)] | |
| 1108. |
It is desired to route data from many registers to one register. The device needed is |
| A. | decoder |
| B. | multiplexer |
| C. | demultiplexer |
| D. | counter |
| Answer» C. demultiplexer | |
| 1109. |
In a 4 bit counter the output of 3 JK FFs from MSB downward are connected to the NAND gate whose O/P is connected to CLR |
| A. | it is a MOD-14 counter |
| B. | it is MOD-13 counter |
| C. | it is divided by 13 counter |
| D. | it is divide by 10 counter |
| Answer» B. it is MOD-13 counter | |
| 1110. |
The circuit of the given figure gives the output Y = |
| A. | AB |
| B. | A + B |
| C. | A B |
| D. | A + B |
| Answer» E. | |
| 1111. |
10 in BCD code represent |
| A. | 10100 |
| B. | 1100 |
| C. | 10111 |
| D. | None of the above |
| Answer» E. | |
| 1112. |
The expression Y = pM (0, 1, 3, 4) is |
| A. | POS |
| B. | SOP |
| C. | Hybrid |
| D. | none of the above |
| Answer» B. SOP | |
| 1113. |
Which are the pending interrupts? |
| A. | 5.5 |
| B. | 6.5 |
| C. | 7.5 |
| D. | None |
| Answer» D. None | |
| 1114. |
TTL circuit with active pull up is preferred because of its suitability for |
| A. | wired AND operation |
| B. | bus operated system |
| C. | wired logic operation |
| D. | reasonable dissipation and speed of operation |
| Answer» E. | |
| 1115. |
Boolean expression for the output of XNOR (Equivalent) logic gate with inputs A and B is |
| A. | AB + AB |
| B. | AB + AB |
| C. | (A + B). (A + B) |
| D. | (A + B). (A + B) |
| Answer» D. (A + B). (A + B) | |
| 1116. |
The greatest negative number which can be stored is 8 bit computer using 2's complement arithmetic is |
| A. | -256 |
| B. | -128 |
| C. | -255 |
| D. | -127 |
| Answer» C. -255 | |
| 1117. |
Logic hardware is available only in NAND and NOR. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 1118. |
In which function is each term known as minterm? |
| A. | SOP |
| B. | POS |
| C. | Hybrid |
| D. | Both SOP and POS |
| Answer» B. POS | |
| 1119. |
The counter in the given figure is |
| A. | Mod 3 |
| B. | Mod 6 |
| C. | Mod 8 |
| D. | Mod 7 |
| Answer» C. Mod 8 | |
| 1120. |
The digit F in hexadecimal system is equivalent to number __________ in decimal system. |
| A. | 16 |
| B. | 15 |
| C. | 17 |
| D. | 8 |
| Answer» C. 17 | |
| 1121. |
In a NAND SR latch S = R = 1. Then |
| A. | Q = 1, Q = 0 |
| B. | Q = 0, Q = 1 |
| C. | both Q and Q will be same as before |
| D. | the latch will be set |
| Answer» D. the latch will be set | |
| 1122. |
A 4 bit down counter starts counting from 1111 irrespective of modulus. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | 8 |
| Answer» C. 1 | |
| 1123. |
A universal shift register can shift left or right. |
| A. | 1 |
| B. | |
| C. | counter |
| D. | digital to analog converter |
| Answer» B. | |
| 1124. |
When a binary adder is used as BCD adder, the sum is |
| A. | correct when it is < 9 |
| B. | correct when it is > 9 |
| C. | correct when it is < 16 |
| D. | none of these |
| Answer» B. correct when it is > 9 | |
| 1125. |
The total number of input words for 4 input OR gate is |
| A. | 20 |
| B. | 16 |
| C. | 12 |
| D. | 8 |
| Answer» C. 12 | |
| 1126. |
In the given figure assume that initially Q = 1 with Clock Pulses being given, the subsequent states of Q will be |
| A. | 1, 0, 1, 0, 1...... |
| B. | 0, 0, 0, 0, 0...... |
| C. | 1, 1, 1, 1, 1...... |
| D. | 0, 1, 0, 1, 0...... |
| Answer» D. 0, 1, 0, 1, 0...... | |
| 1127. |
An 8085 microprocessor based system uses a 4 k x 8 bit RAM whose address in AAOOH. The address of the last byte in this RAM is |
| A. | OFFFH |
| B. | 1000H |
| C. | B9FFH |
| D. | BA00H |
| Answer» E. | |
| 1128. |
In a positive edge triggered JK flip flop |
| A. | High J and High K produce inactive state |
| B. | Low J and High K produce inactive state |
| C. | Low J and Low K produce inactive state |
| D. | High J and Low K produce inactive state |
| Answer» D. High J and Low K produce inactive state | |
| 1129. |
The circuit in the figure is has two CMOS-NOR gates. This circuit functions as a |
| A. | flip-flop |
| B. | schmitt trigger |
| C. | monostable multivibrator |
| D. | astable multivibrator |
| Answer» D. astable multivibrator | |
| 1130. |
Equation xl0 = 110010012 when solved for x gives the value of x as |
| A. | 8 |
| B. | 111 |
| C. | 152 |
| D. | 201 |
| Answer» E. | |
| 1131. |
If Vin is 0.99 V, what is the digital output of the ADC 0801 after INTER goes low? |
| A. | 0011 0011 |
| B. | 0101 1111 |
| C. | 0111 1100 |
| D. | 1111 1111 |
| Answer» B. 0101 1111 | |
| 1132. |
A pulse train with a 1 MHz frequency is counted using a 1024 modulus ripple counter using JK flip flops. The maximum propagation delay for each flip-flop should be |
| A. | 1 μs |
| B. | 0.5 μs |
| C. | 0.2 μs |
| D. | 0.1 μs |
| Answer» E. | |
| 1133. |
Periodic recharging of the memory cells at regular intervals of 3 to 8 millisecond is required in a |
| A. | ROM |
| B. | Static RAM |
| C. | Dynamic RAM |
| D. | PLA |
| Answer» D. PLA | |
| 1134. |
The circuit of the given figure realizes the function |
| A. | Y = (A + B) C + DE |
| B. | Y = A + B + C + D + E |
| C. | AB + C +DE |
| D. | AB + C(D + E) |
| Answer» B. Y = A + B + C + D + E | |
| 1135. |
The simplest register is |
| A. | buffer register |
| B. | shift register |
| C. | controlled buffer register |
| D. | bidirectional register |
| Answer» B. shift register | |
| 1136. |
For the given truth table, the correct Boolean expression is |
| A. | XYZ + X YZ + X Y Z |
| B. | X Y Z + XYZ + X YZ |
| C. | X Y Z + XYZ + XY Z |
| D. | XYZ + XYZ + XY Z |
| Answer» C. X Y Z + XYZ + XY Z | |
| 1137. |
Schottky clamping is resorted to in TTL gates |
| A. | to reduce propagation delay |
| B. | to increase noise margin |
| C. | to increase packing density |
| D. | to increase fan out |
| Answer» B. to increase noise margin | |
| 1138. |
If the inputs to a 2 input XOR gate are high then, the output is high. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 1139. |
A two-input OR gate is designed for positive logic. However, it is operated with negative logic. The resulting logic operation will then be |
| A. | OR |
| B. | AND |
| C. | NOR |
| D. | EX-OR |
| Answer» B. AND | |
| 1140. |
The output of basic DTL configuration is |
| A. | low when one of the input is high |
| B. | low when all inputs are high |
| C. | high when all inputs are high |
| D. | high when all inputs are low |
| Answer» C. high when all inputs are high | |
| 1141. |
In which counter does the maximum frequency depend on the modulus? |
| A. | Synchronous |
| B. | Ripple |
| C. | Both synchronous and ripple |
| D. | Neither synchronous nor ripple |
| Answer» C. Both synchronous and ripple | |
| 1142. |
Assertion (A): CMOS devices have very low power consumption Reason (R): CMOS devices have high noise margin. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» C. A is true, R is false | |
| 1143. |
In a ripple counter, |
| A. | whenever a flip flop sets to 1, the next higher FF toggles |
| B. | whenever a flip flop sets to 0, the next higher FF remains unchanged |
| C. | whenever a flip flop sets to 1, the next higher FF faces race condition |
| D. | whenever a flip flop sets to 0, the next higher FF faces race condition |
| Answer» B. whenever a flip flop sets to 0, the next higher FF remains unchanged | |
| 1144. |
A ring counter with 5 flip flops will have |
| A. | 5 states |
| B. | 10 states |
| C. | 32 states |
| D. | infinite states |
| Answer» B. 10 states | |
| 1145. |
In a D latch |
| A. | data bit D is fed to S input and D to R input |
| B. | data bit D is fed to R input and D to S input |
| C. | data bit D is fed to both R and S inputs |
| D. | data bit D is not fed to any input |
| Answer» B. data bit D is fed to R input and D to S input | |
| 1146. |
Decimal 45.15 when converted into 9's complement will become |
| A. | 54.84 |
| B. | 45.48 |
| C. | 48.54 |
| D. | 45.84 |
| Answer» B. 45.48 | |
| 1147. |
Which of the following binary product is incorrect? |
| A. | 1100 x 1010 = 1111000 |
| B. | 1.01 x 10.1 = 11.001 |
| C. | 1100110 x 1000 = 1100110000 |
| D. | None of the above |
| Answer» E. | |
| 1148. |
Each cell of a static RAM has |
| A. | 4 MOS transistors |
| B. | 4 MOS transistors and 2 capacitors |
| C. | 2 MOS transistors and two capacitors |
| D. | 1 MOS transistor and 1 capacitor |
| Answer» B. 4 MOS transistors and 2 capacitors | |
| 1149. |
Symbol in the given figure is IEEE symbol for |
| A. | AND |
| B. | OR |
| C. | NAND |
| D. | NOR |
| Answer» C. NAND | |
| 1150. |
A parallel in-parallel out shift register can be used to introduce delay in digital circuits. |
| A. | 1 |
| B. | |
| C. | 0 |
| D. | 101 |
| Answer» C. 0 | |