MCQOPTIONS
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MCQOPTIONS
This section includes 17 Mcqs, each offering curated multiple-choice questions to sharpen your Embedded Systems knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
Which of the following uses a linear line fill interfacing? |
| A. | MC68040 |
| B. | MC68030 |
| C. | US 74707 B2 |
| D. | Hyper Bus |
| Answer» C. US 74707 B2 | |
| 2. |
Which of the following is a Motorola’s protocol product? |
| A. | MCM62940 |
| B. | Avalon |
| C. | Slave interfaces |
| D. | AXI slave interfaces |
| Answer» B. Avalon | |
| 3. |
Which of the following uses a wrap around burst interfacing? |
| A. | MC68030 |
| B. | MC68040 |
| C. | HyperBus |
| D. | US 5729504 A |
| Answer» C. HyperBus | |
| 4. |
WHICH_OF_THE_FOLLOWING_USES_A_WRAP_AROUND_BURST_INTERFACING??$ |
| A. | MC68030 |
| B. | MC68040 |
| C. | HyperBus |
| D. | US 5729504 A |
| Answer» C. HyperBus | |
| 5. |
Which of the following uses a linear line fill interfacing?$ |
| A. | MC68040 |
| B. | MC68030 |
| C. | US 74707 B2 |
| D. | Hyper Bus |
| Answer» C. US 74707 B2 | |
| 6. |
Which of the following is a Motorola’s protocol product?$# |
| A. | MCM62940 |
| B. | Avalon |
| C. | Slave interfaces |
| D. | AXI slave interfaces |
| Answer» B. Avalon | |
| 7. |
Which of the following protocol matches the MC68040? |
| A. | MCM62486 |
| B. | US 5729504 A |
| C. | HyperBus |
| D. | MCM62940 |
| Answer» E. | |
| 8. |
Which of the following protocol matches the Intel 80486? |
| A. | MCM62940 |
| B. | MCM62486 |
| C. | US 74707 B2 |
| D. | Hyper Bus |
| Answer» C. US 74707 B2 | |
| 9. |
In which memory does the burst interfaces act as a part of the cache? |
| A. | DRAM |
| B. | ROM |
| C. | SRAM |
| D. | Flash memory |
| Answer» D. Flash memory | |
| 10. |
How can gate delays be reduced? |
| A. | synchronous memory |
| B. | asynchronous memory |
| C. | pseudo asynchronous memory |
| D. | symmetrical memory |
| Answer» B. asynchronous memory | |
| 11. |
What type of timing is required for the burst interfaces? |
| A. | synchronous |
| B. | equal |
| C. | unequal |
| D. | symmetrical |
| Answer» D. symmetrical | |
| 12. |
In which of the following access, the address is supplied? |
| A. | the first access |
| B. | the second access |
| C. | third access |
| D. | fourth access |
| Answer» B. the second access | |
| 13. |
How many clocks are required for the first access in the burst interface? |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» C. 3 | |
| 14. |
Which of the following memory access can reduce the clock cycles? |
| A. | bus interfacing |
| B. | burst interfacing |
| C. | dma |
| D. | dram |
| Answer» C. dma | |
| 15. |
How did burst interfaces access faster memory? |
| A. | segmentation |
| B. | dma |
| C. | static column memory |
| D. | memory |
| Answer» D. memory | |
| 16. |
Which of the following makes use of the burst fill technique? |
| A. | burst interfaces |
| B. | dma |
| C. | peripheral interfaces |
| D. | input-output interfaces |
| Answer» B. dma | |
| 17. |
Which of the following include special address generation and data latches? |
| A. | burst interface |
| B. | peripheral interface |
| C. | dma |
| D. | input-output interfacing |
| Answer» B. peripheral interface | |