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This section includes 21 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
A principle regarding most display decoders is that when the correct input is present, the related output will switch ____________ |
| A. | HIGH |
| B. | To high impedance |
| C. | To an open |
| D. | LOW |
| Answer» E. | |
| 2. |
A 4-bit counter has a maximum modulus of ____________ |
| A. | 3 |
| B. | 6 |
| C. | 8 |
| D. | 16 |
| Answer» E. | |
| 3. |
Three cascaded decade counters will divide the input frequency by ____________ |
| A. | 10 |
| B. | 20 |
| C. | 100 |
| D. | 1000 |
| Answer» E. | |
| 4. |
A 4-bit ripple counter consists of flip-flops, which each have a propagation delay from clock to Q output of 15 ns. For the counter to recycle from 1111 to 0000, it takes a total of ____________ |
| A. | 15 ns |
| B. | 30 ns |
| C. | 45 ns |
| D. | 60 ns |
| Answer» E. | |
| 5. |
An asynchronous 4-bit binary down counter changes from count 2 to count 3. How many transitional states are required? |
| A. | 1 |
| B. | 2 |
| C. | 8 |
| D. | 15 |
| Answer» E. | |
| 6. |
A 5-bit asynchronous binary counter is made up of five flip-flops, each with a 12 ns propagation delay. The total propagation delay (tp(total)) is ____________ |
| A. | 12 ms |
| B. | 24 ns |
| C. | 48 ns |
| D. | 60 ns |
| Answer» E. | |
| 7. |
How many different states does a 3-bit asynchronous counter have? |
| A. | 2 |
| B. | 4 |
| C. | 8 |
| D. | 16 |
| Answer» D. 16 | |
| 8. |
The terminal count of a typical modulus-10 binary counter is ____________ |
| A. | 0000 |
| B. | 1010 |
| C. | 1001 |
| D. | 1111 |
| Answer» D. 1111 | |
| 9. |
What happens to the parallel output word in an asynchronous binary down counter whenever a clock pulse occurs? |
| A. | The output increases by 1 |
| B. | The output decreases by 1 |
| C. | The output word increases by 2 |
| D. | The output word decreases by 2 |
| Answer» C. The output word increases by 2 | |
| 10. |
Internal propagation delay of asynchronous counter is removed by ____________ |
| A. | Ripple counter |
| B. | Ring counter |
| C. | Modulus counter |
| D. | Synchronous counter |
| Answer» E. | |
| 11. |
One of the major drawbacks to the use of asynchronous counters is that ____________ |
| A. | Low-frequency applications are limited because of internal propagation delays |
| B. | High-frequency applications are limited because of internal propagation delays |
| C. | Asynchronous counters do not have major drawbacks and are suitable for use in high- and low-frequency counting applications |
| D. | Asynchronous counters do not have propagation delays, which limits their use in high-frequency applications |
| Answer» C. Asynchronous counters do not have major drawbacks and are suitable for use in high- and low-frequency counting applications | |
| 12. |
A ripple counter’s speed is limited by the propagation delay of _____________ |
| A. | Each flip-flop |
| B. | All flip-flops and gates |
| C. | The flip-flops only with gates |
| D. | Only circuit gates |
| Answer» B. All flip-flops and gates | |
| 13. |
A_5-BIT_ASYNCHRONOUS_BINARY_COUNTER_IS_MADE_UP_OF_FIVE_FLIP-FLOPS,_EACH_WITH_A_12_NS_PROPAGATION_DELAY._THE_TOTAL_PROPAGATION_DELAY_(TP(TOTAL))_IS?$ |
| A. | 12 ms |
| B. | 24 ns |
| C. | 48 ns |
| D. | 60 ns |
| Answer» E. | |
| 14. |
A 4-bit ripple counter consists of flip-flops, which each have a propagation delay from clock to Q output of 15 ns. For the counter to recycle from 1111 to 0000, it takes a total of$ |
| A. | 15 ns |
| B. | 30 ns |
| C. | 45 ns |
| D. | 60 ns |
| Answer» E. | |
| 15. |
An_asynchronous_4-bit_binary_down_counter_changes_from_count_2_to_count_3._How_many_transitional_states_are_required?$ |
| A. | 1 |
| B. | 2 |
| C. | 8 |
| D. | 15 |
| Answer» E. | |
| 16. |
A principle regarding most display decoders is that when the correct input is present, the related output will switch |
| A. | HIGH |
| B. | To high impedance |
| C. | To an open |
| D. | LOW |
| Answer» E. | |
| 17. |
A 4-bit counter has a maximum modulus of |
| A. | 3 |
| B. | 6 |
| C. | 8 |
| D. | 16 |
| Answer» E. | |
| 18. |
Three cascaded decade counters will divide the input frequency by |
| A. | 10 |
| B. | 20 |
| C. | 100 |
| D. | 1000 |
| Answer» E. | |
| 19. |
The terminal count of a typical modulus-10 binary counter is |
| A. | 0000 |
| B. | 1010 |
| C. | 1001 |
| D. | 1111 |
| Answer» D. 1111 | |
| 20. |
Internal propagation delay of asynchronous counter is removed by |
| A. | Ripple counter |
| B. | Ring counter |
| C. | Modulus counter |
| D. | Synchronous counter |
| Answer» E. | |
| 21. |
A ripple counter’s speed is limited by the propagation delay of:$ |
| A. | Each flip-flop |
| B. | All flip-flops and gates |
| C. | The flip-flops only with gates |
| D. | Only circuit gates |
| Answer» B. All flip-flops and gates | |