MCQOPTIONS
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| 1. |
The diagram of a logic circuit is given below. The output F of the circuit is represented by |
| A. | \[W.(X+Y)\] |
| B. | \[W\cdot \,(X\cdot Y)\] |
| C. | If assertion is true but reason is false. |
| D. | \[W+(X+Y)\] |
| Answer» D. \[W+(X+Y)\] | |