MCQOPTIONS
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MCQOPTIONS
This section includes 20 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
An asynchronous binary up counter, made from a series of leading edge-triggered flip-flops, can be changed to a down counter by ________ |
| A. | Taking the output on the other side of the flip-flops (instead of Q) |
| B. | Clocking of each succeeding flip-flop from the other side (instead of Q) |
| C. | Changing the flip-flops to trailing edge triggering |
| D. | All of the Mentioned |
| Answer» E. | |
| 2. |
The designation means that the ________ |
| A. | Up count is active-HIGH, the down count is active-LOW |
| B. | Up count is active-LOW, the down count is active-HIGH |
| C. | Up and down counts are both active-LOW |
| D. | Up and down counts are both active-HIGH |
| Answer» B. Up count is active-LOW, the down count is active-HIGH | |
| 3. |
A modulus-10 counter must have ________ |
| A. | 10 flip-flops |
| B. | 4 Flip-flops |
| C. | 2 flip-flops |
| D. | Synchronous clocking |
| Answer» C. 2 flip-flops | |
| 4. |
Once an up-/down-counter begins its count sequence, it ___________ |
| A. | Starts counting |
| B. | Can be reversed |
| C. | Can’t be reversed |
| D. | Can be altered |
| Answer» E. | |
| 5. |
Binary counter that count incrementally and decrement is called ___________ |
| A. | Up-down counter |
| B. | LSI counters |
| C. | Down counter |
| D. | Up counter |
| Answer» B. LSI counters | |
| 6. |
In DOWN-counter, each flip-flop is triggered by ___________ |
| A. | The output of the next flip-flop |
| B. | The normal output of the preceding flip-flop |
| C. | The clock pulse of the previous flip-flop |
| D. | The inverted output of the preceding flip-flop |
| Answer» E. | |
| 7. |
In an UP-counter, each flip-flop is triggered by ___________ |
| A. | The output of the next flip-flop |
| B. | The normal output of the preceding flip-flop |
| C. | The clock pulse of the previous flip-flop |
| D. | The inverted output of the preceding flip-flop |
| Answer» C. The clock pulse of the previous flip-flop | |
| 8. |
UP-DOWN counter is also known as ___________ |
| A. | Dual counter |
| B. | Multi counter |
| C. | Multimode counter |
| D. | Two Counter |
| Answer» D. Two Counter | |
| 9. |
UP-DOWN counter is a combination of ____________ |
| A. | Latches |
| B. | Flip-flops |
| C. | UP counter |
| D. | Up counter & down counter |
| Answer» E. | |
| 10. |
WHICH_IS_NOT_AN_EXAMPLE_OF_A_TRUNCATED_MODULUS??$ |
| A. | 8 |
| B. | 9 |
| C. | 11 |
| D. | 15 |
| Answer» B. 9 | |
| 11. |
An asynchronous binary up counter, made from a series of leading edge-triggered flip-flops, can be changed to a down counter by ________$ |
| A. | Taking the output on the other side of the flip-flops ( instead of Q) |
| B. | Clocking of each succeeding flip-flop from the other side ( instead of Q) |
| C. | Changing the flip-flops to trailing edge triggering |
| D. | All of the Mentioned |
| Answer» E. | |
| 12. |
The designation means that the ________$ |
| A. | Up count is active-HIGH, the down count is active-LOW |
| B. | Up count is active-LOW, the down count is active-HIGH |
| C. | Up and down counts are both active-LOW |
| D. | Up and down counts are both active-HIGH |
| Answer» B. Up count is active-LOW, the down count is active-HIGH | |
| 13. |
A 4-bit binary up counter has an input clock frequency of 20 kHz. The frequency of the most significant bit is ________ |
| A. | 1.25 kHz |
| B. | 2.50 kHz |
| C. | 160 kHz |
| D. | 320 kHz |
| Answer» B. 2.50 kHz | |
| 14. |
A modulus-10 counter must have _______? |
| A. | 10 flip-flops |
| B. | Flip-flops |
| C. | 2 flip-flops |
| D. | Synchronous clocking |
| Answer» C. 2 flip-flops | |
| 15. |
In 4-bit up-down counter, how many flip-flops are required? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» D. 5 | |
| 16. |
Once an up-/down-counter begins its count sequence, it |
| A. | Starts counting |
| B. | Can be reversed |
| C. | Can’t be reversed |
| D. | None of the Mentioned |
| Answer» E. | |
| 17. |
Binary counter that count incrementally and decremently is called |
| A. | Up-down counter |
| B. | LSI counters |
| C. | Down counter |
| D. | Up counter |
| Answer» B. LSI counters | |
| 18. |
In an UP-counter, each flip-flop is triggered by |
| A. | The output of the next flip-flop |
| B. | The normal output of the preceding flip-flop |
| C. | The clock pulse of the previous flip-flop |
| D. | The inverted output of the preceding flip-flop |
| Answer» C. The clock pulse of the previous flip-flop | |
| 19. |
UP-DOWN counter is also known as |
| A. | Dual counter |
| B. | Multi counter |
| C. | Multimode counter |
| D. | None of the Mentioned |
| Answer» D. None of the Mentioned | |
| 20. |
UP-DOWN counter is a combination of |
| A. | Latches |
| B. | Flip-flops |
| C. | UP counter |
| D. | Up counter & down counter |
| Answer» E. | |