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This section includes 11 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
If a 10-bit ring counter has an initial state 1101000000, what is the state after the second clock pulse? |
| A. | 1101000000 |
| B. | 0011010000 |
| C. | 1100000000 |
| D. | 0000000000 |
| Answer» C. 1100000000 | |
| 2. |
In a 4-bit Johnson counter sequence, there are a total of how many states or bit patterns? |
| A. | 1 |
| B. | 3 |
| C. | 4 |
| D. | 8 |
| Answer» E. | |
| 3. |
What type of register would have a complete binary number shifted in one bit at a time and have all the stored bits shifted out one at a time? |
| A. | Parallel-in Parallel-out |
| B. | Parallel-in Serial-out |
| C. | Serial-in Serial-out |
| D. | Serial-in Parallel-out |
| Answer» D. Serial-in Parallel-out | |
| 4. |
By adding recirculating lines to a 4-bit parallel-in serial-out shift register, it becomes a ________ ________ and ________ out register. |
| A. | Parallel-in, serial, parallel |
| B. | Serial-in, parallel, serial |
| C. | Series-parallel-in, series, parallel |
| D. | Bidirectional in, parallel, series |
| Answer» B. Serial-in, parallel, serial | |
| 5. |
The group of bits 10110111 is serially shifted (right-most bit first) into an 8-bit parallel output shift register with an initial state 11110000. After two clock pulses, the register contains ______________ |
| A. | 10111000 |
| B. | 10110111 |
| C. | 11110000 |
| D. | 11111100 |
| Answer» E. | |
| 6. |
IF_A_10-BIT_RING_COUNTER_HAS_AN_INITIAL_STATE_1101000000,_WHAT_IS_THE_STATE_AFTER_THE_SECOND_CLOCK_PULSE??$ |
| A. | 1101000000 |
| B. | 0011010000 |
| C. | 1100000000 |
| D. | 0000000000 |
| Answer» C. 1100000000 | |
| 7. |
How_much_storage_capacity_does_each_stage_in_a_shift_register_represent?$ |
| A. | One bit |
| B. | Two bits |
| C. | Four bits |
| D. | Eight bits |
| Answer» B. Two bits | |
| 8. |
By adding recirculating lines to a 4-bit parallel-in serial-out shift register, it becomes a ________, ________, and ________out register. |
| A. | Parallel-in, serial, parallel |
| B. | Serial-in, parallel, serial |
| C. | Series-parallel-in, series, parallel |
| D. | Bidirectional in, parallel, series |
| Answer» B. Serial-in, parallel, serial | |
| 9. |
The group of bits 10110111 is serially shifted (right-most bit first) into an 8-bit parallel output shift register with an initial state 11110000. After two clock pulses, the register contains |
| A. | 10111000 |
| B. | 10110111 |
| C. | 11110000 |
| D. | 11111100 |
| Answer» E. | |
| 10. |
In a parallel in/parallel out shift register, D0 = 1, D1 = 1, D2 = 1, and D3 = 0. After three clock pulses, the data outputs are ________ |
| A. | 1110 |
| B. | 0001 |
| C. | 1100 |
| D. | 1000 |
| Answer» C. 1100 | |
| 11. |
A bidirectional 4-bit shift register is storing the nibble 1110. Its input is LOW. The nibble 0111 is waiting to be entered on the serial data-input line. After two clock pulses, the shift register is storing ________ |
| A. | 1110 |
| B. | 0111 |
| C. | 1000 |
| D. | 1001 |
| Answer» E. | |