MCQOPTIONS
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MCQOPTIONS
This section includes 13 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
If the input of type 1 PLL is a frequency step of Δw at t = 0, the change in phase at t = infinity is: |
| A. | Δw |
| B. | Δw/Kpd |
| C. | Δw/Kpd.Kvco |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 2. |
Instead of Phase detection, if Frequency detector is used the drawback PLL would face is: |
| A. | Finite difference between input and output frequency |
| B. | Equality cannot be established if PLL compared input and output frequency rather than pulses |
| C. | Error between Vin and Vout cannot be removed |
| D. | All of the mentioned |
| Answer» E. | |
| 3. |
What is the function of LPF in the following block diagram? |
| A. | Suppress high frequency components of VCO output and presenting low frequency AC signal to PD |
| B. | Suppress high frequency components of PD output and presenting low frequency AC signal to VCO |
| C. | Suppress high frequency components of PD output and presenting DC signal to VCO |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 4. |
What is the relation between input and output in the following circuit? |
| A. | Exponential |
| B. | Linear |
| C. | Sinusoidal |
| D. | None of the mentioned |
| Answer» C. Sinusoidal | |
| 5. |
What is the input at the phase detector? |
| A. | V1(t) – V2(t) |
| B. | Phase(V1) + Phase(V2) |
| C. | Phase(V1) – Phase(V2) |
| D. | V1(t) + V2(t) |
| Answer» D. V1(t) + V2(t) | |
| 6. |
IF_THE_INPUT_OF_TYPE_1_PLL_IS_A_FREQUENCY_STEP_OF_‚ÂÀ√≠‚ÀÖ√ÜW_AT_T_=_0,_THE_CHANGE_IN_PHASE_AT_T_=_INFINITY_IS:?$# |
| A. | Δw |
| B. | Δw/Kpd |
| C. | Δw/Kpd.Kvco |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 7. |
The transfer function of PD is : |
| A. | Constant |
| B. | Varies with frequency |
| C. | Varies with voltage |
| D. | None of the Mentioned |
| Answer» B. Varies with frequency | |
| 8. |
Number of poles in Type 1 PLL is: |
| A. | 0 |
| B. | 1 |
| C. | 2 |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 9. |
If high pass filter is used instead of Low pass filter in the PLL the response of PLL would be: |
| A. | Output Voltage is not a square wave |
| B. | Output Voltage contains many high frequency waves |
| C. | VCO will be unstable due to variations in control voltage |
| D. | All of the mentioned |
| Answer» C. VCO will be unstable due to variations in control voltage | |
| 10. |
Instead of Phase detection, if Frequency detector is used the drawback PLL would face is? |
| A. | Finite difference between input and output frequency |
| B. | Equality cannot be established if PLL compared input and output frequency rather than pulses |
| C. | Error between Vin and Vout cannot be removed |
| D. | All of the mentioned |
| Answer» E. | |
| 11. |
The aligning of output phase of voltage controlled oscillator with reference is called: |
| A. | Phase compensation |
| B. | Phase alignment |
| C. | Phase Locking |
| D. | Phase detecting |
| Answer» D. Phase detecting | |
| 12. |
The Logic gate that works similar to phase detector is: |
| A. | AND gate |
| B. | OR gate |
| C. | XOR gate |
| D. | NOT gate |
| Answer» D. NOT gate | |
| 13. |
The PLL device is: |
| A. | Feedback system that compares output frequency and input frequency |
| B. | Feedback system that compares output phase and input phase |
| C. | Linear system that compares output resistance and input resistance |
| D. | Non Linear system that compares output current and input current |
| Answer» C. Linear system that compares output resistance and input resistance | |