MCQOPTIONS
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MCQOPTIONS
This section includes 9 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
Noise margin of CMOS is: |
| A. | Better than TTL and ECL |
| B. | Less than TTL and ECL |
| C. | Equal to TTL and ECL |
| D. | None of the Mentioned |
| Answer» B. Less than TTL and ECL | |
| 2. |
If VIH of the 2nd gate is higher than VOH of the 1st gate, then logic output 0 from the 1st gate is considered as: |
| A. | Logic input 1 |
| B. | Uncertain |
| C. | Logic input 0 |
| D. | None of the mentioned |
| Answer» C. Logic input 0 | |
| 3. |
Input Voltage between VIL and VOL is considered as: |
| A. | Logic Input 1 |
| B. | Logic Input 0 |
| C. | Uncertain |
| D. | None of the mentioned |
| Answer» C. Uncertain | |
| 4. |
If VIL of the 2nd gate is lower than VOL of the 1st gate, then logic output 0 from the 1st gate is considered as: |
| A. | Logic input 1 |
| B. | Uncertain |
| C. | Logic input 0 |
| D. | None of the mentioned |
| Answer» C. Logic input 0 | |
| 5. |
If VIL of the 2nd gate is higher than VOL of the 1st gate, then logic output 0 from the 1st gate is considered as: |
| A. | Logic input 1 |
| B. | Uncertain |
| C. | Logic input 0 |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 6. |
The noise immunity ____________ with noise margin. |
| A. | Decreases |
| B. | Increases |
| C. | Constant |
| D. | None of the Mentioned |
| Answer» C. Constant | |
| 7. |
The Higher Noise Margin is given by: |
| A. | VOH VIH |
| B. | VIH VOH |
| C. | VIH ~ VOH(Difference between VIH and VOH, depends on which one is greater) |
| D. | All of the mentioned |
| Answer» B. VIH VOH | |
| 8. |
The VIH is found from transfer characteristic of inverter by: |
| A. | The point where straight line at VOH ends |
| B. | The slope of the transition at a point at which the slope is equal to -1 |
| C. | The midpoint of the transition line |
| D. | All of the mentioned |
| Answer» C. The midpoint of the transition line | |
| 9. |
Noise Margin is: |
| A. | Amount of noise the logic circuit can withstand |
| B. | Difference between VOH and VIH |
| C. | Difference between VIL and VOL |
| D. | All of the Mentioned |
| Answer» E. | |