MCQOPTIONS
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MCQOPTIONS
This section includes 45 Mcqs, each offering curated multiple-choice questions to sharpen your Electrical Engineering knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
It is possible to copy a file in the same directory.~! |
| A. | True |
| B. | False |
| Answer» B. False | |
| 2. |
In Fortran 77 a variable name can contain special characters.~! |
| A. | True |
| B. | False |
| Answer» C. | |
| 3. |
Which of the following is not a general purpose peripheral?~! |
| A. | I/O port |
| B. | Programmable interrupt controller |
| C. | Programmable CRT controller |
| D. | Programmable interval timer |
| Answer» D. Programmable interval timer | |
| 4. |
MS Access is a DBMS software.~! |
| A. | True |
| B. | False |
| Answer» B. False | |
| 5. |
The five flags in 8085 are designated as%! |
| A. | Z, CY, S, P and AC |
| B. | D, Z, S, P, AC |
| C. | Z, C, S, P, AC |
| D. | Z, CY, S, D, AC |
| Answer» B. D, Z, S, P, AC | |
| 6. |
IC 7485 cannot be cascadeD.%! |
| A. | True |
| B. | False |
| Answer» C. | |
| 7. |
If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory)%! |
| A. | Doubles |
| B. | Remains unchanged |
| C. | Halves |
| D. | Increases by 2^(address bits)/addressability |
| Answer» D. Increases by 2^(address bits)/addressability | |
| 8. |
Internet is a worldwide network of computers where most of the information is freely available.%! |
| A. | True |
| B. | False |
| Answer» B. False | |
| 9. |
When the write enable input is not asserted, the gated D latch _________ its output.%! |
| A. | Can not change |
| B. | Clears |
| C. | Sets |
| D. | Complements |
| Answer» B. Clears | |
| 10. |
For the number A[15:0] = 0110110010001111, A[14:13] is ______ A[3:2].%! |
| A. | Less than |
| B. | Greater than |
| C. | The same as |
| D. | Cannot be determined |
| Answer» D. Cannot be determined | |
| 11. |
Which of the following is not treated as hexadecimal constant by assembler in 8085?%! |
| A. | 45 H |
| B. | 6 AFH |
| C. | 234 |
| D. | 64 H |
| Answer» D. 64 H | |
| 12. |
Which of the following is type declaration statement in C?%! |
| A. | int bar |
| B. | s = s + 1 |
| C. | king = horse + 1 |
| D. | prin = prin * prin |
| Answer» B. s = s + 1 | |
| 13. |
In 8085 which addressing mode is also called inherent addressing?%! |
| A. | Direct |
| B. | Register |
| C. | Implicit |
| D. | Immediate |
| Answer» D. Immediate | |
| 14. |
Assertion (A): Each memory chip has its own address latch.Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip.%! |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is correct R is wrong |
| D. | A is wrong R is correct |
| Answer» E. | |
| 15. |
An e-mail message can be sent to many recipients.%! |
| A. | True |
| B. | False |
| Answer» B. False | |
| 16. |
The minimum number of transistors required to implement a two input AND gate is%! |
| A. | 2 |
| B. | 4 |
| C. | 6 |
| D. | 8 |
| Answer» D. 8 | |
| 17. |
Each instruction in assembly language program has the following fields:Lable fieldMnemonic fieldOperand fieldComment fieldThe correct sequence of these fields is?%! |
| A. | 1, 2, 3, 4 |
| B. | 1, 2, 4, 3 |
| C. | 2, 1, 3, 4 |
| D. | 2, 1, 4, 3 |
| Answer» B. 1, 2, 4, 3 | |
| 18. |
In 8085%! |
| A. | P flag is set when the result has even parity |
| B. | P flag is set when the result has odd parity |
| C. | P flag is reset when the result has odd parity |
| D. | P flag is reset when the result has even parity |
| Answer» B. P flag is set when the result has odd parity | |
| 19. |
Which of the following pair of gates can form a latch?%! |
| A. | A pair of cross coupled OR |
| B. | A pair of cross copled AND |
| C. | A pair of cross coupled NAND |
| D. | A cross coupled NAND/OR |
| Answer» D. A cross coupled NAND/OR | |
| 20. |
Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier.[Hint: Construct the truth table for the adder and the multiplier]%! |
| A. | Circuit A has more gates than circuit B |
| B. | Circuit B has more gates than circuit A |
| C. | Circuit A has the same number of gates as circuit B |
| D. | None of the above |
| Answer» B. Circuit B has more gates than circuit A | |
| 21. |
Assertion (A): Negative values of incremental operator in DO loop are allowed in Fortran 77 but not in earlier versions of Fortran.Reason (R): Fortran 77 has better array facilities than earlier versions of Fortran.%! |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is correct R is wrong |
| D. | A is wrong R is correct |
| Answer» C. A is correct R is wrong | |
| 22. |
A structure that stores a number of bits taken “together as a unit” is a%! |
| A. | Gate |
| B. | Mux |
| C. | Decoder |
| D. | Register |
| Answer» E. | |
| 23. |
Which of the following is a valid integer constant?%! |
| A. | 127 |
| B. | 127.0 |
| C. | 127 |
| D. | 125 + 3 |
| Answer» B. 127.0 | |
| 24. |
In a computer the data transfer between hard disk and CPU is nearly the same as that between diskette and CPU.%! |
| A. | True |
| B. | False |
| Answer» C. | |
| 25. |
In one’s complement 8 bit representation 11111111 represents%! |
| A. | +0 |
| B. | -0 |
| C. | +1 |
| D. | -1 |
| Answer» C. +1 | |
| 26. |
The number of interrupt lines in 8085 is%! |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» E. | |
| 27. |
The character set of Fortran 77 includes lower case alphabets a to z.%! |
| A. | True |
| B. | False |
| Answer» C. | |
| 28. |
For a memory with a 16-bit address space, the addressability is%! |
| A. | 16 bits |
| B. | 8 bits |
| C. | 2^16 bits |
| D. | Cannot be determined |
| Answer» E. | |
| 29. |
In 8086 the number of bytes which can be addressed directly is about%! |
| A. | 1000 |
| B. | 10000 |
| C. | 100000 |
| D. | one million |
| Answer» E. | |
| 30. |
*/*_Of the following circuits, the one which involves storage is? |
| A. | RS Latch |
| B. | Mux |
| C. | Nand |
| D. | Decoder |
| Answer» B. Mux | |
| 31. |
*/*_Which memory has read operation, byte erase, byte write and chip erase?? |
| A. | RAM |
| B. | UVEPROM |
| C. | EEPROM |
| D. | Both B and C |
| Answer» D. Both B and C | |
| 32. |
*/*_In C the keywords are also called? |
| A. | Special words |
| B. | Reserved words |
| C. | Class words |
| D. | Character words |
| Answer» C. Class words | |
| 33. |
*/*_In a C expression using assignment operators, relational operators and arithmetic operators, the hierarchy of operations (in the absence of parenthesis) is? |
| A. | Assignment, relational, arithmetic |
| B. | Relational, assignment, arithmetic |
| C. | Arithmetic, assignment, relational |
| D. | Arithmetic, relational, assignment |
| Answer» E. | |
| 34. |
_ An I/O processor controls the flow of information between$? |
| A. | Cache memory and I/O devices |
| B. | Main memory and I/O devices |
| C. | Two I/O devices |
| D. | Cache and main memory |
| Answer» C. Two I/O devices | |
| 35. |
_ The timing difference between a slow memory and fast processor can be resolved if$? |
| A. | Processor is capable of waiting |
| B. | External buffer is used |
| C. | Either A or B |
| D. | Neither A nor B |
| Answer» D. Neither A nor B | |
| 36. |
_ The operating modes of 8255 A are called$? |
| A. | Mode 0 and mode 1 |
| B. | Mode 0, mode 1 and mode 2 |
| C. | Mode 0 and mode 2 |
| D. | Mode 0, mode 2 and mode 3 |
| Answer» C. Mode 0 and mode 2 | |
| 37. |
_ We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Which of the following sets are logically complete$? |
| A. | Set of {AND,OR} |
| B. | Set of {EXOR, NOT} |
| C. | Set of {AND,OR,NOT} |
| D. | None of the above |
| Answer» D. None of the above | |
| 38. |
In 8085, the pins for SID and SOD are$? |
| A. | 4 and 5 respectively |
| B. | 5 and 4 respectively |
| C. | 3 and 4 respectively |
| D. | 4 and 3 respectively |
| Answer» C. 3 and 4 respectively | |
| 39. |
If m is a power of 2, the number of select lines required for an m-input mux is:$? |
| A. | m |
| B. | 2^m |
| C. | log2 (m) |
| D. | 2*m |
| Answer» D. 2*m | |
| 40. |
If the sign bit of mantissa is 0 and the exponent is increased from a positive to a more negative number the result is$? |
| A. | A larger floating point number |
| B. | A smaller floating point number |
| C. | Either A or B depending on the actual number |
| D. | A negative floating point number |
| Answer» B. A smaller floating point number | |
| 41. |
Because we wish to allow each ASCII code to occupy one location in memory, most memories are __________ addressable.$? |
| A. | BYTE |
| B. | NIBBLE |
| C. | WORD (16 bits) |
| D. | DOUBLEWORD (32 bits) |
| Answer» B. NIBBLE | |
| 42. |
When .9432 E – 4 is subtracted from .5452 E – 3 in normalized floating point mode$ |
| A. | None of the numbers is changed |
| B. | .9432 E – 4 is changed to .09432 E – 3 and .5452 E – 3 is not changed |
| C. | .5452 E – 3 is changed to 5.452 E – 4 but .9432 E – 4 is not changed |
| D. | Both Ihe numbers are changed and their exponents are, made equal to -5 |
| Answer» C. .5452 E ‚Äö√Ñ√¨ 3 is changed to 5.452 E ‚Äö√Ñ√¨ 4 but .9432 E ‚Äö√Ñ√¨ 4 is not changed | |
| 43. |
Which of the following conditions is not allowed in an RS latch? |
| A. | R is asserted, S is asserted |
| B. | R is asserted, S is negated |
| C. | R is negated, S is asserted |
| D. | R is negated, S is negated |
| Answer» B. R is asserted, S is negated | |
| 44. |
Using DeMorgan’s Theorem we can convert any AND-OR structure into$ |
| A. | NAND-NAND |
| B. | OR-NAND |
| C. | NAND-NOR |
| D. | NOR-NAND |
| Answer» B. OR-NAND | |
| 45. |
‘Burst refresh’ in DRAM is also called# |
| A. | Concentrated refresh |
| B. | Distributed refresh |
| C. | Hidden refresh |
| D. | None of the above |
| Answer» B. Distributed refresh | |