MCQOPTIONS
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MCQOPTIONS
This section includes 243 Mcqs, each offering curated multiple-choice questions to sharpen your Internet of things (IoT) knowledge and support exam preparation. Choose a topic below to get started.
| 51. |
Timer_B has |
| A. | three serial communication ports |
| B. | seven LCD driver |
| C. | seven compare/capture channels |
| D. | three LED driver ports |
| Answer» D. three LED driver ports | |
| 52. |
Why do we make the connection of the SCLK for communicating serially between two devices? |
| A. | to get a clock output from the device |
| B. | to synchronize the two devices |
| C. | to obtain an analog output |
| D. | all of the mentioned |
| Answer» C. to obtain an analog output | |
| 53. |
Are the two instructions similar mov.w @R5+, R6 and mov.w R6,0( R5) incd.w R5 |
| A. | yes |
| B. | no |
| C. | can't be said |
| D. | depends on the conditions |
| Answer» B. no | |
| 54. |
Which of the following is correct about WDTCTL? |
| A. | it is a 16 bit register |
| B. | it is guided against accidental writes that require a password |
| C. | a reset will occur if a value with an incorrect password is written to WDTCTL |
| D. | all of the mentioned |
| Answer» E. | |
| 55. |
The process of setting the WDTCNTCL bit in WDTCTL is through |
| A. | petting |
| B. | feeding |
| C. | kicking |
| D. | all of the mentioned |
| Answer» E. | |
| 56. |
Is this instruction correct? WDTCTL_bit.WDTCNTCL = 1; |
| A. | yes |
| B. | no |
| C. | can't be said |
| D. | depends on the conditions |
| Answer» C. can't be said | |
| 57. |
Integral nonlinearity is termed as |
| A. | process of reduction of a continuous input to a discrete output |
| B. | change in measured value from the true value |
| C. | maximum deviation between this corrected staircase and the actual transfer characteristic |
| D. | the function used in quantization |
| Answer» D. the function used in quantization | |
| 58. |
Debouncing can be carried out at a hardware as well as the software end? |
| A. | yes |
| B. | no |
| C. | can't be said |
| D. | depends on the conditions |
| Answer» B. no | |
| 59. |
What actually is bit bagging? |
| A. | it actually refers to the technique of assigning the bits with their inputs |
| B. | a technique by which a MSP430 can communicate through hardware |
| C. | a technique by which MSP430 can communicate through software |
| D. | a technique through which conversion becomes possible |
| Answer» D. a technique through which conversion becomes possible | |
| 60. |
dadd instruction can act as |
| A. | valid BCD addition |
| B. | valid adder with carry |
| C. | both of the mentioned |
| D. | none of the mentioned |
| Answer» B. valid adder with carry | |
| 61. |
Which of the following is the analog to digital converter that is present in the MSP430 based processors? |
| A. | comparator |
| B. | successive approximation ADC |
| C. | sigma delta ADC |
| D. | all of the mentioned |
| Answer» E. | |
| 62. |
P2CA4-P2CA0 bits are used for |
| A. | giving the power supply to the comparator module |
| B. | for selecting the mode of operation of the comparator |
| C. | for connecting the non inverting inputs to the CA0-CA2 pins |
| D. | all of the mentioned |
| Answer» D. all of the mentioned | |
| 63. |
USCI consists of |
| A. | one channel |
| B. | two channels |
| C. | three channels |
| D. | four channels |
| Answer» C. three channels | |
| 64. |
8255 is a ____ pin IC. |
| A. | 16 |
| B. | 8 |
| C. | 40 |
| D. | 60 |
| Answer» D. 60 | |
| 65. |
More power can be saved by using low_power mode 0 than low_power mode 3 |
| A. | true |
| B. | false |
| C. | can't be said |
| D. | depends on the conditions |
| Answer» C. can't be said | |
| 66. |
Which of the following functions is not related to port P1? |
| A. | P1SEL |
| B. | P1DIR |
| C. | P1IES |
| D. | All of the mentioned |
| Answer» E. | |
| 67. |
Which of the following conditions is more difficult to attain? |
| A. | synchronous masters |
| B. | synchronous slaves |
| C. | asynchronous masters |
| D. | asynchronous slaves |
| Answer» E. | |
| 68. |
Falling edge of the SS pin denotes |
| A. | end of the transfer |
| B. | starts a new transfer |
| C. | selects a new master |
| D. | none of the mentioned |
| Answer» C. selects a new master | |
| 69. |
All digital communications doesn’t require any clock. |
| A. | true |
| B. | false |
| C. | can't be said |
| D. | depends on the conditions |
| Answer» C. can't be said | |
| 70. |
The RTC module is configured in the calendar mode if |
| A. | RTCMODEx= 00 |
| B. | RTCMODEx= 11 |
| C. | RTCTEVx= 00 |
| D. | RTCTEVx= 11 |
| Answer» C. RTCTEVx= 00 | |
| 71. |
Here the word sigma represents |
| A. | subtraction |
| B. | differentiation |
| C. | integration |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 72. |
ADC10 and ADC12 are |
| A. | The converters |
| B. | SAR modules available in the MSP430 |
| C. | Sigma delta modules available in the MSP430 |
| D. | Comparator modules available in the MSP430 |
| Answer» C. Sigma delta modules available in the MSP430 | |
| 73. |
Which of the following modes is also known as the RAM retention mode? |
| A. | LPM0 |
| B. | LPM3 |
| C. | LPM4 |
| D. | All of the mentioned |
| Answer» D. All of the mentioned | |
| 74. |
To select the value of the clock to be fosc/16, what are the appropriate values? |
| A. | SPI2X= 0, SPR1= 0, SPR0=1 |
| B. | SPI2X= 0, SPR1= 1, SPR0=0 |
| C. | SPI2X= 1, SPR1= 1, SPR0=0 |
| D. | SPI2X= 0, SPR1= 1, SPR0=1 |
| Answer» B. SPI2X= 0, SPR1= 1, SPR0=0 | |
| 75. |
Timer1 is responsible for |
| A. | providing a clock to the LCD module |
| B. | cause an interrupt |
| C. | a pulse for the RTC |
| D. | all of the mentioned |
| Answer» E. | |
| 76. |
The concept of SPI is based on |
| A. | two counters |
| B. | four flip flops |
| C. | two shift registers |
| D. | four steady state machines |
| Answer» D. four steady state machines | |
| 77. |
MSP430 uses vectored interrupts? |
| A. | true |
| B. | false |
| C. | can't be said |
| D. | depends on the conditions |
| Answer» B. false | |
| 78. |
Which of the following is a register used for programming AVR’s I2C module? |
| A. | TWBR |
| B. | TWCR |
| C. | TWSR |
| D. | All of the mentioned |
| Answer» E. | |
| 79. |
Usually a capacitor is inserted between an analog input and the ground because |
| A. | it blocks the analog voltage |
| B. | it suppresses the noise |
| C. | it increases the gain |
| D. | none of the mentioned |
| Answer» C. it increases the gain | |
| 80. |
MSP430 describes reti instruction as |
| A. | Format1 addressing |
| B. | Format2 addressing |
| C. | Jump addressing |
| D. | None of the mentioned |
| Answer» C. Jump addressing | |
| 81. |
In continuous mode of the counter |
| A. | counter moves from 0000-ffff |
| B. | counter moves from ffff-0000-ffff |
| C. | counter moves from 0000-ffff and then again returns to 0 |
| D. | all of the mentioned |
| Answer» D. all of the mentioned | |
| 82. |
When any subroutine is called, then the first value of stack will be |
| A. | value of PC |
| B. | the return address |
| C. | none of the mentioned |
| D. | both are one and the same things |
| Answer» E. | |
| 83. |
Which bit is polled to know that whether the TWI is ready or not? |
| A. | TWWC |
| B. | TWINT |
| C. | TWEA |
| D. | All of the mentioned |
| Answer» C. TWEA | |
| 84. |
When an interrupt is accepted, the contents of the status register are |
| A. | set |
| B. | reset |
| C. | remains the same |
| D. | can't be said |
| Answer» C. remains the same | |
| 85. |
Timer_A is used in |
| A. | SPI |
| B. | I2C |
| C. | Asynchronous Serial Communication |
| D. | All of the mentioned |
| Answer» D. All of the mentioned | |
| 86. |
The SPDT switch can be used as a |
| A. | detecting circuit |
| B. | debouncing circuit |
| C. | devaluing circuit |
| D. | dejunerrating circuit |
| Answer» C. devaluing circuit | |
| 87. |
DS12887 is known for as a |
| A. | Communication device |
| B. | Good battery device |
| C. | RTC chip |
| D. | All of the mentioned |
| Answer» D. All of the mentioned | |
| 88. |
Indexed addressing can be used for |
| A. | source |
| B. | destination |
| C. | both of the mentioned |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 89. |
The capture/compare registers TBCCRn are double-buffered, when used for compare events? |
| A. | true |
| B. | false |
| C. | can't be said |
| D. | depends on the conditions |
| Answer» B. false | |
| 90. |
The filtered digital signal is then decimated to |
| A. | reduce the rate of samples from fm to fs |
| B. | reduce the rate of samples from fs to fm |
| C. | increase the rate of samples from fm to fs |
| D. | increase th rate of samples from fs to fm |
| Answer» B. reduce the rate of samples from fs to fm | |
| 91. |
The I2C bus uses which of the following lines |
| A. | CLK |
| B. | MISO |
| C. | SDA |
| D. | All of the mentioned |
| Answer» D. All of the mentioned | |
| 92. |
8255 has handshaking capability? |
| A. | yes |
| B. | no |
| C. | can't be said |
| D. | depends on the conditions |
| Answer» B. no | |
| 93. |
_BIC_SR_IRQ() is used to |
| A. | set the particular bits of the SR |
| B. | reset the particular bits of the SR |
| C. | any of the above mentioned depending on the conditions |
| D. | none of the mentioned |
| Answer» C. any of the above mentioned depending on the conditions | |
| 94. |
How many cycles are used by MSP430, when reti instruction is executed? |
| A. | 3 |
| B. | 4 |
| C. | 5 |
| D. | depends on the conditions |
| Answer» D. depends on the conditions | |
| 95. |
mov.w @PC+,R6 is a type of |
| A. | direct addressing |
| B. | indirect addressing |
| C. | immediate addressing |
| D. | indirect auto increment addressing |
| Answer» D. indirect auto increment addressing | |
| 96. |
Non mask able vectors are stored at different vector locations? |
| A. | true |
| B. | false |
| C. | can't be said |
| D. | depends on the conditions |
| Answer» C. can't be said | |
| 97. |
What is right about the ROR instruction? |
| A. | it rotates the contents of the register left to right |
| B. | it rotates the contents of the register from right to left |
| C. | it rotates the contents of the register from left to right through carry |
| D. | it rotates the contents of the register from right to left through carry |
| Answer» D. it rotates the contents of the register from right to left through carry | |
| 98. |
Which of the following instruction can used to toggle a bit of the PORT? |
| A. | SBI |
| B. | CBI |
| C. | Both of the mentioned |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 99. |
Instruction CBI PORTB,1 means |
| A. | clearing the PORTB register |
| B. | clearing the first bit of the PORTB register |
| C. | setting the PORTB register |
| D. | setting the first bit of the PORTB register |
| Answer» C. setting the PORTB register | |
| 100. |
By default, INT0-INT2 interrupts are? |
| A. | edge triggered |
| B. | level triggered |
| C. | all of the mentioned |
| D. | none of the mentioned |
| Answer» C. all of the mentioned | |