MCQOPTIONS
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MCQOPTIONS
This section includes 346 Mcqs, each offering curated multiple-choice questions to sharpen your Mechanical Engineering knowledge and support exam preparation. Choose a topic below to get started.
| 101. |
Which command of an LCD is used to shift the entire display to the right? |
| A. | 0x1c |
| B. | 0x18 |
| C. | 0x05 |
| D. | 0x07 |
| Answer» B. 0x18 | |
| 102. |
Which of the following step/s is/are correct to perform reading operation from an LCD? |
| A. | low to high pulse at e pin |
| B. | r/w pin is set high |
| C. | low to high pulse at e pin & r/w pin is set high |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 103. |
Which pin of the LCD is used for adjusting its contrast? |
| A. | pin no 1 |
| B. | pin no 2 |
| C. | pin no 3 |
| D. | pin no 4 |
| Answer» D. pin no 4 | |
| 104. |
To identify that which key is being pressed, we need to: |
| A. | ground all the pins of the port at a time |
| B. | ground pins of the port one at a time |
| C. | connect all the pins of the port to the main supply at a time |
| D. | none of the mentioned |
| Answer» C. connect all the pins of the port to the main supply at a time | |
| 105. |
For writing commands on an LCD, RS bit is |
| A. | set |
| B. | reset |
| C. | set & reset |
| D. | none of the mentioned |
| Answer» C. set & reset | |
| 106. |
How many rows and columns are present in a 16*2 alphanumeric LCD? |
| A. | rows=2, columns=32 |
| B. | rows=16, columns=2 |
| C. | rows=16, columns=16 |
| D. | rows=2, columns=16 |
| Answer» E. | |
| 107. |
Key press detection and Key identification are: |
| A. | the same processes |
| B. | two different works are done in keyboard interfacing |
| C. | none of the mentioned |
| D. | any of the mentioned |
| Answer» C. none of the mentioned | |
| 108. |
If we need to operate a key of a keyboard in an interrupt mode, then it will generate what kind of interrupt? |
| A. | es |
| B. | ex0/ex1 |
| C. | t0/t1 |
| D. | reset |
| Answer» C. t0/t1 | |
| 109. |
To detect that in which column, the key is placed? |
| A. | we can mask the bits and then check it |
| B. | we can rotate the bits and then check that particular bit which is set or reset(according to the particular condition) |
| C. | none of the mentioned |
| D. | all of the mentioned |
| Answer» E. | |
| 110. |
Which of the following steps detects the key in a 4*4 keyboard matrix about the key that is being pressed? |
| A. | masking of bits |
| B. | ensuring that initially, all keys are open |
| C. | checking that whether the key is actually pressed or not |
| D. | all of the mentioned |
| Answer» E. | |
| 111. |
In reading the columns of a matrix, if no key is pressed we should get all in binary notation |
| A. | 0 |
| B. | 1 |
| C. | f |
| D. | 7 |
| Answer» C. f | |
| 112. |
The pin that clears the control word register of 8255 when enabled is |
| A. | clear |
| B. | set |
| C. | reset |
| D. | clk |
| Answer» D. clk | |
| 113. |
If A1=0, A0=1 then the input read cycle is performed from |
| A. | port a to data bus |
| B. | port b to data bus |
| C. | port c to data bus |
| D. | cwr to data bus |
| Answer» C. port c to data bus | |
| 114. |
The port that is used for the generation of handshake lines in mode 1 or mode 2 is |
| A. | port a |
| B. | port b |
| C. | port c lower |
| D. | port c upper |
| Answer» E. | |
| 115. |
The device that receives or transmits data upon the execution of input or output instructions by the microprocessor is |
| A. | control word register |
| B. | read/write control logic |
| C. | 3-state bidirectional buffer |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 116. |
The input provided by the microprocessor to the read/write control logic is |
| A. | reset |
| B. | a1 |
| C. | wr(active low) |
| D. | all of the mentioned |
| Answer» E. | |
| 117. |
The data bus buffer is controlled by |
| A. | control word register |
| B. | read/write control logic |
| C. | data bus |
| D. | none of the mentioned |
| Answer» C. data bus | |
| 118. |
All the functions of the ports of 8255 are achieved by programming the bits of an internal register called |
| A. | data bus control |
| B. | read logic control |
| C. | control word register |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 119. |
Port C of 8255 can function independently as |
| A. | input port |
| B. | output port |
| C. | either input or output ports |
| D. | both input and output ports |
| Answer» D. both input and output ports | |
| 120. |
Programmable peripheral input-output port is another name for |
| A. | serial input-output port |
| B. | parallel input-output port |
| C. | serial input port |
| D. | parallel output port |
| Answer» C. serial input port | |
| 121. |
How many bytes of bit addressable memory is present in 8051 based microcontrollers? |
| A. | 8 bytes |
| B. | 32 bytes |
| C. | 16 bytes |
| D. | 128 bytes |
| Answer» D. 128 bytes | |
| 122. |
If we push data onto the stack then the stack pointer |
| A. | increases with every push |
| B. | decreases with every push |
| C. | increases & decreases with every push |
| D. | none of the mentioned |
| Answer» B. decreases with every push | |
| 123. |
How are the bits of the register PSW affected if we select Bank2 of 8051? |
| A. | psw.5=0 and psw.4=1 |
| B. | psw.2=0 and psw.3=1 |
| C. | psw.3=1 and psw.4=1 |
| D. | psw.3=0 and psw.4=1 |
| Answer» E. | |
| 124. |
When the microcontroller executes some arithmetic operations, then the flag bits of which register are affected? |
| A. | psw |
| B. | sp |
| C. | dptr |
| D. | pc |
| Answer» B. sp | |
| 125. |
When 8051 wakes up then 0x00 is loaded to which register? |
| A. | psw |
| B. | sp |
| C. | pc |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 126. |
8051 series has how many 16 bit registers? |
| A. | 2 |
| B. | 3 |
| C. | 1 |
| Answer» B. 3 | |
| 127. |
AT89C2051 has RAM of: |
| A. | 128 bytes |
| B. | 256 bytes |
| C. | 64 bytes |
| D. | 512 bytes |
| Answer» B. 256 bytes | |
| 128. |
8051 microcontrollers are manufactured by which of the following companies? |
| A. | atmel |
| B. | philips |
| C. | intel |
| D. | all of the mentioned |
| Answer» E. | |
| 129. |
The instruction that represents the ‘rotate source, count’ is |
| A. | rcl |
| B. | rcr |
| C. | ror |
| D. | all of the mentioned |
| Answer» E. | |
| 130. |
The instruction that multiplies the content of AL with a signed immediate operand is |
| A. | mul |
| B. | smul |
| C. | imul |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 131. |
The statement that is true for the instruction POP*A is |
| A. | flags are unaffected |
| B. | no operands are required |
| C. | exceptions generated are same as that of push*a |
| D. | all of the mentioned |
| Answer» E. | |
| 132. |
While executing the PUSH*A instruction, the stack pointer is decremented by |
| A. | 1 bit |
| B. | 2 bits |
| C. | 4 bits |
| D. | 16 bits |
| Answer» C. 4 bits | |
| 133. |
The instruction that pushes the general purpose registers, pointer and index registers on to the stack is |
| A. | popf |
| B. | push imd |
| C. | push*a |
| D. | pushf |
| Answer» D. pushf | |
| 134. |
The representation of 8-bit or 16-bit signed binary operands using 2’s complement is a data type of |
| A. | ordinal |
| B. | ascii |
| C. | packed bcd |
| D. | integer |
| Answer» E. | |
| 135. |
Which of the following is not a data type of 80286? |
| A. | ordinal or unsigned |
| B. | ascii |
| C. | packed bcd |
| D. | none of the mentioned |
| Answer» E. | |
| 136. |
The address of a location of the operand is calculated by adding the contents of any of the base registers, with the contents of any of index registers in |
| A. | based indexed mode with displacement |
| B. | based indexed mode |
| C. | based mode |
| D. | indexed mode |
| Answer» C. based mode | |
| 137. |
In which of the following addressing mode, the offset is obtained by adding displacement, with the contents of SI? |
| A. | direct mode |
| B. | register mode |
| C. | based mode |
| D. | indexed mode |
| Answer» E. | |
| 138. |
In which of the following addressing mode, the offset is obtained by adding displacement and contents of one of the base registers? |
| A. | direct mode |
| B. | register mode |
| C. | based mode |
| D. | indexed mode |
| Answer» D. indexed mode | |
| 139. |
In register address mode, the operand is stored in |
| A. | 8-bit general purpose register |
| B. | 16-bit general purpose register |
| C. | si or di |
| D. | all of the mentioned |
| Answer» E. | |
| 140. |
In which of these modes, the immediate operand is included in the instruction itself? |
| A. | register operand mode |
| B. | immediate operand mode |
| C. | register and immediate operand mode |
| D. | none of the mentioned |
| Answer» C. register and immediate operand mode | |
| 141. |
The device that generates the basic timing clock signal for the operation of the circuit using crystal oscillator is |
| A. | timing unit |
| B. | timing and control unit |
| C. | oscillator |
| D. | clock generator |
| Answer» D. clock generator | |
| 142. |
The registers that are not accessible by the user are |
| A. | accumulator and b register |
| B. | ip and ie |
| C. | instruction registers |
| D. | tmp1 and tmp2 |
| Answer» E. | |
| 143. |
The register that provides control and status information about counters is |
| A. | ip |
| B. | tmod |
| C. | tscon |
| D. | pcon |
| Answer» C. tscon | |
| 144. |
The architecture of 8051 consists of |
| A. | 4 latches |
| B. | 2 timer registers |
| C. | 4 on-chip i/o ports |
| D. | all of the mentioned |
| Answer» E. | |
| 145. |
The register that provides control and status information about serial port is |
| A. | ip |
| B. | ie |
| C. | tscon |
| D. | pcon and scon |
| Answer» E. | |
| 146. |
The receive buffer of serial data buffer is a |
| A. | serial-in parallel-out register |
| B. | parallel-in serial-out register |
| C. | serial-in serial-out register |
| D. | parallel-in parallel-out register |
| Answer» B. parallel-in serial-out register | |
| 147. |
The transmit buffer of serial data buffer is a |
| A. | serial-in parallel-out register |
| B. | parallel-in serial-out register |
| C. | serial-in serial-out register |
| D. | parallel-in parallel-out register |
| Answer» C. serial-in serial-out register | |
| 148. |
Which of the processor’s stack does not contain the top-down data structure? |
| A. | 8086 |
| B. | 80286 |
| C. | 8051 |
| D. | 80386 |
| Answer» D. 80386 | |
| 149. |
The register that can be used as a scratch pad is |
| A. | accumulator |
| B. | b register |
| C. | data register |
| D. | accumulator and b register |
| Answer» C. data register | |
| 150. |
A chemical transduction system is interfaced to the optical fibre at its end. This type of sensor is called? |
| A. | chemical sensor |
| B. | thermal sensor |
| C. | photoelectric sensor |
| D. | light sensor |
| Answer» B. thermal sensor | |