Explore topic-wise MCQs in Testing Subject.

This section includes 657 Mcqs, each offering curated multiple-choice questions to sharpen your Testing Subject knowledge and support exam preparation. Choose a topic below to get started.

1.

A buffer is a device that isolates other devices. Typically a buffer has

A. a high input impedance and a low output impedance
B. a high input impedance as well as output impedance
C. a low input impedance and a high output impedance
D. a low input impedance as well as output impedance
Answer» B. a high input impedance as well as output impedance
2.

In a positive edge triggered D flip flop

A. D input is called direct set
B. Preset is called direct reset
C. Present and clear are called direct set and reset respectively
D. D input overrides other inputs
Answer» D. D input overrides other inputs
3.

Which of the following is used as switch?

A. J-K flip-flop
B. Master slave J-K flip-flop
C. T-flip-flop
D. D-flip-flop
Answer» E.
4.

The first contribution to logic was made by

A. George Boole
B. Copernicus
C. Aristotle
D. Shannon
Answer» D. Shannon
5.

Average latency time of magnetic tape memory is of the order of

A. 1 sec
B. 1 msec
C. 1 sec
D. 1 minute
Answer» E.
6.

The output impedance of a logic pulser is

A. low
B. high
C. may be Low or High
D. can't say
Answer» B. high
7.

In a J-K flip flop the input J = K = 1 pulse is about

A. set
B. reset
C. no change
D. toggle
Answer» E.
8.

The communicating capacitor reduces turn on time because

A. it acts as an open circuit
B. it allows maximum base circuit to flow
C. it aids in removing the excess carrier from the base region
D. none of these
Answer» C. it aids in removing the excess carrier from the base region
9.

With a JK master-slave flip-flop the master is clocked when the clock is __________ , and the slave is triggered when the clock is __________ .

A. low, low
B. high, low
C. low, high
D. high, high
Answer» C. low, high
10.

Four MSI TTL 4-bit ripple counters are cascaded to form a 16-bit binary counter. Its propagation delay is about __________ nanoseconds.

A. 70
B. 140
C. 210
D. 280
Answer» E.
11.

The accuracy of A/D conversion is generally

A. <img src="/_files/images/electronics-and-communication-engineering/digital-electronics/19-199-1.png">
B. LSB
C. <img src="/_files/images/electronics-and-communication-engineering/digital-electronics/19-199-3.png">
D. none of the above
Answer» B. LSB
12.

To convert JK flip flop to D flip flop

A. connect D to both J and K
B. connect D to J directly and D to K through inverter
C. connect D to K directly and D to J through inverter
D. connect D to K and leave J open
Answer» C. connect D to K directly and D to J through inverter
13.

Read cycle is always followed by (during instructions execution)

A. read cycle
B. write cycle
C. delete signal
D. none of these
Answer» C. delete signal
14.

Semiconductor ROM's are sometimes preferred to semiconductor RAM's because

A. ROM's are cheaper than RAMs
B. ROMs are faster
C. ROMs do not require power supply for their operations
D. Programs stored in ROMs cannot be altered either by the power failure or by the user
Answer» E.
15.

RAMs can be built with bipolar or CMOS transistor RAMs that are not possible with bipolar transistors are

A. SRAM
B. SRAM, DRAM
C. DRAM
D. PROM
Answer» D. PROM
16.

In D-type FF, Preset (Pr) and clear (Clr) inputs are called

A. Synchronous
B. Asynchronous
C. Data
D. None
Answer» C. Data
17.

RS latch can be built with

A. NOR gates
B. NAND gates
C. NOR or NAND gates
D. none of the above
Answer» D. none of the above
18.

Which memory is available in all technologies?

A. PROM
B. EEPROM
C. ROM
D. EPROM
Answer» B. EEPROM
19.

Decimal number 5436 when converted into 9's complement will become

A. 4356
B. 4653
C. 4563
D. 4655
Answer» D. 4655
20.

What is output 'Z' of an EX-OR gate, whose all inputs are set at A?

A. Z = A
B. Z = 1
C. Z = 0
D. Z = A
Answer» D. Z = A
21.

Minimum number of J-K flip-flop needed to construct a BCD counter is

A. 2
B. 3
C. 4
D. 5
Answer» D. 5
22.

The following switching functions are to be implemented using a decoder f1 = m (1, 2, 4, 8, 10, 14)f2 = m (2, 5, 9, 15)f3 = m (2, 4, 5, 6, 7) The minimum configuration of decoder is

A. 2 to 4 line
B. 3 to 8 line
C. 4 to 16 line
D. 5 to 32 line
Answer» D. 5 to 32 line
23.

For the logic circuit of the given figure the simplified Boolean expression is

A. A B
B. A + B
C. AB
D. <span style="text-decoration:overline;">A</span>
E. + B
Answer» B. A + B
24.

In 8085, to disable the whole interrupt system (except TRAP)

A. the DI instruction may be used
B. the DO instruction may be used
C. the INTERRUPT instruction may be used
D. the El instruction may be used
Answer» B. the DO instruction may be used
25.

The reason for glitches on the outputs of decoding gates on a synchronous counter is

A. FFs changing states together
B. FFs changing states one at a time
C. AND gates not functioning properly
D. none of the above
Answer» C. AND gates not functioning properly
26.

EEPROM is also known as

A. UVPROM
B. EAPROM
C. both UVPROM and EAPROM
D. none of the above
Answer» C. both UVPROM and EAPROM
27.

The MOS symbols shown indicates: that it is depletion typethat it is enhancement typethat it is n channelthat it is p channelthat electrons flow from D to Sthat holes flow from D to S The only true statements are

A. 1, 3, 6
B. 2, 4, 6
C. 1, 3, 5
D. 2, 3, 6
Answer» B. 2, 4, 6
28.

TTL circuit with active pull up is preferred because of its suitability for

A. wired AND operation
B. bus operated system
C. wired logic operation
D. reasonable dissipation and speed of operation
Answer» E.
29.

A parity check usually can detect

A. one-bit error
B. double-bit error
C. three-bit error
D. any-bit error
Answer» B. double-bit error
30.

Which of the following is 'synchronous'?

A. Half adder
B. Full adder
C. R-S flip-flop
D. Clocked R-S flip-flop
Answer» E.
31.

TRAP is __________ whereas RST 7.5, RST 6.5, RST 5.5 are __________ .

A. maskable, non-maskable
B. maskable, maskable
C. non-maskable, non-maskable
D. non-maskable, maskable
Answer» E.
32.

In a flip-flop with a NAND latch, a low R and a low S produces

A. active condition
B. inactive condition
C. race condition
D. dead condition
Answer» D. dead condition
33.

If a microcomputer has a 64 K memory; what is the hexadecimal notations for the first memory location?

A. AAAA
B. FFFF
C. AAA0
D. 0000
Answer» E.
34.

In figure, R = 20K and C = 75 pF. The converter clock frequency will be

A. 606 Hz
B. 1212 Hz
C. 555 KHz
D. 606 KHz
Answer» B. 1212 Hz
35.

ECL can be used to high frequencies in the order of

A. 500 kHz
B. 1 MHz
C. 100 MHz
D. 500 MHz
Answer» E.
36.

In the switching circuit, switches A, B have value 0 for OFF, 1 for ON and the output Y has 0 volts for 1 volts, then the expression for Y is

A. AB
B. A + B
C. <span style="text-decoration:overline;">A + B</span>
D. AB
Answer» D. AB
37.

2's complement number 00011111 = __________ 10

A. +31
B. -31
C. +11
D. -11
Answer» B. -31
38.

In 8085 microprocessor, what is the length of temporary register?

A. 6 bits
B. 8 bits
C. 12 bits
D. 16 bits
Answer» C. 12 bits
39.

In a positive edge triggered JK flip flop, J = 1, K = 0 and clock pulse is rising Q will

A. be 0
B. be 1
C. show no change
D. toggle
Answer» C. show no change
40.

What is the gray code word for EX-OR the binary number 101011?

A. 101011
B. 110101
C. 111110
D. 011111
Answer» E.
41.

Digital circuits mostly use

A. Diodes
B. Bipolar transistors
C. Diodes and bipolar transistors
D. Bipolar transistors and FETs
Answer» D. Bipolar transistors and FETs
42.

The contents of stack location after the call operation will be

A. 00000111
B. 00001110
C. 00001010
D. 00001111
Answer» B. 00001110
43.

A 16 bit binary adder has

A. 16 half adders
B. 16 full adders
C. one half adders and 15 full adders
D. 8 half adders and eight full adders
Answer» D. 8 half adders and eight full adders
44.

The hexadecimal number 5 F is equal to binary number

A. 1010011
B. 1011001
C. 1010101
D. 1011111
Answer» E.
45.

Which of the following methods is used for solving differential equations numerically?

A. Runge-Kutta method
B. Gauss-elimination method
C. Newton-Raphson method
D. Any one of these
Answer» B. Gauss-elimination method
46.

Some ADCs are ParallelUpdownSingle slopeDual slopeSuccessive approximationStair step Out of above which ones do not use DAC?

A. 1 only
B. 1, 3, 4
C. 1, 2, 3
D. 1, 5, 6
Answer» C. 1, 2, 3
47.

As compared to TTL, ECL has

A. lower power dissipation
B. lower propagation delay
C. higher propagation delay
D. higher noise margin
Answer» C. higher propagation delay
48.

The problem of current lagging is associated with

A. DCTL gates
B. DTL gates
C. ECL gates
D. CMOS gates
Answer» B. DTL gates
49.

Binary 1111 when subtracted from binary 11111 is

A. 101110
B. 10110
C. 10000
D. 100010
Answer» B. 10110
50.

In a NOT gate the output is always the opposite of the input.

A. True
B. False
Answer» B. False