MCQOPTIONS
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MCQOPTIONS
This section includes 21 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
A disadvantage of DTL is ___________ |
| A. | The input transistor to the resister |
| B. | The input resister to the transistor |
| C. | The increased fan-in |
| D. | The increased fan-out |
| Answer» C. The increased fan-in | |
| 2. |
To increase fan-out of the gate in DTL ___________ |
| A. | An additional capacitor may be used |
| B. | An additional resister may be used |
| C. | An additional transistor and diode may be used |
| D. | Only an additional diode may be used |
| Answer» D. Only an additional diode may be used | |
| 3. |
A major advantage of DTL over the earlier resistor–transistor logic is the ___________ |
| A. | Increased fan out |
| B. | Increased fan in |
| C. | Decreased fan out |
| D. | Decreased fan in |
| Answer» C. Decreased fan out | |
| 4. |
The process to avoid saturating the switching transistor is performed by ___________ |
| A. | Baker clamp |
| B. | James R. Biard |
| C. | Chris Brown |
| D. | Totem-Pole |
| Answer» B. James R. Biard | |
| 5. |
The way to speed up DTL is to add an across intermediate resister is ___________ |
| A. | Small “speed-up” capacitor |
| B. | Large “speed-up” capacitor |
| C. | Small “speed-up” transistor |
| D. | Large ” speed-up” transistor |
| Answer» B. Large “speed-up” capacitor | |
| 6. |
The DTL propagation delay is relatively ___________ |
| A. | Large |
| B. | Small |
| C. | Moderate |
| D. | Negligible |
| Answer» B. Small | |
| 7. |
The full form of CTDL is ___________ |
| A. | Complemented transistor diode logic |
| B. | Complemented transistor direct logic |
| C. | Complementary transistor diode logic |
| D. | Complementary transistor direct logic |
| Answer» B. Complemented transistor direct logic | |
| 8. |
In DTL amplifying function is performed by ___________ |
| A. | Diode |
| B. | Transistor |
| C. | Inductor |
| D. | Capacitor |
| Answer» C. Inductor | |
| 9. |
In DTL logic gating function is performed by ___________ |
| A. | Diode |
| B. | Transistor |
| C. | Inductor |
| D. | Capacitor |
| Answer» B. Transistor | |
| 10. |
Diode–transistor logic (DTL) is the direct ancestor of _____________ |
| A. | Register-transistor logic |
| B. | Transistor–transistor logic |
| C. | High threshold logic |
| D. | Emitter Coupled Logic |
| Answer» C. High threshold logic | |
| 11. |
A_MAJOR_ADVANTAGE_OF_DTL_OVER_THE_EARLIER_RESISTOR‚ÄÖ√Ñ√∂‚ÀÖ√Ë‚ÀÖ¬®TRANSISTOR_LOGIC_IS_THE?$# |
| A. | Increased fan out |
| B. | Increased fan in |
| C. | Decreased fan out |
| D. | Decreased fan in |
| Answer» C. Decreased fan out | |
| 12. |
A disadvantage of DTL is$ |
| A. | The input transistor to the resister |
| B. | The input resister to the transistor |
| C. | The increased fan-in |
| D. | The increased fan-out |
| Answer» C. The increased fan-in | |
| 13. |
To increase fan-out of the gate in DTL$ |
| A. | An additional capacitor may be used |
| B. | An additional resister may be used |
| C. | An additional transistor and diode may be used |
| D. | None of the Mentioned |
| Answer» D. None of the Mentioned | |
| 14. |
The process to avoid saturating the switching transistor is performed b? |
| A. | Baker clamp |
| B. | James R. Biard |
| C. | Chris Brown |
| D. | None of the Mentioned |
| Answer» B. James R. Biard | |
| 15. |
The way to speed up DTL is to add a across intermediate resister |
| A. | Small “speed-up” capacitor |
| B. | Large “speed-up” capacitor |
| C. | Small “speed-up” transistor |
| D. | Large ” speed-up” transistor |
| Answer» B. Large ‚Äö√Ñ√∂‚àö√ë‚àö‚à´speed-up‚Äö√Ñ√∂‚àö√ë‚àöœÄ capacitor | |
| 16. |
The DTL propagation delay is relatively |
| A. | Large |
| B. | Small |
| C. | Moderate |
| D. | Negligible |
| Answer» B. Small | |
| 17. |
The full form of CTDL is |
| A. | Complemented transistor diode logic |
| B. | Complemented transistor direct logic |
| C. | Complementary transistor diode logic |
| D. | None of the Mentioned |
| Answer» B. Complemented transistor direct logic | |
| 18. |
How many stages a DTL consist of? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» C. 4 | |
| 19. |
In DTL amplifying function is performed by |
| A. | Diode |
| B. | Transistor |
| C. | Register |
| D. | Capacitor |
| Answer» C. Register | |
| 20. |
In DTL logic gating function is performed by |
| A. | Diode |
| B. | Transistor |
| C. | Register |
| D. | Capacitor |
| Answer» B. Transistor | |
| 21. |
Diode–transistor logic (DTL) is the direct ancestor of |
| A. | Register-transistor logic |
| B. | Transistor–transistor logic |
| C. | High threshold logic |
| D. | None of the Mentioned |
| Answer» C. High threshold logic | |