2291 + Mcqs in Digital Electronics Page 23 McqOptions

1101.	In the frequency counter, the pulse width of the enable signal is very critical for taking an accurate frequency measurement.
A.	True
B.	False
Answer» B. False

Discussion

1102.	In HDL when a circuit is simulated on a computer, the designer must create all the different scenarios that will be experienced by the actual circuit and must also know the proper response to those inputs.
A.	True
B.	False
Answer» B. False

Discussion

1103.	In the keypad HDL encoder, after releasing a key the ring counter resumes its counting sequence.
A.	True
B.	False
Answer» B. False

Discussion

1104.	The direct drive mode of a stepper motor allows for less control by the operator.
A.	True
B.	False
Answer» C.

Discussion

1105.	The full-step sequence always has two coils of the stepper motor energized in any state of the sequence and typically causes 30 of shaft rotation per step.
A.	True
B.	False
Answer» C.

Discussion

1106.	In the keypad HDL encoder, NANDing of the columns is used to activate the freeze bit.
A.	True
B.	False
Answer» C.

Discussion

1107.	The wave-drive sequence of a stepper motor has more torque and operates more smoothly than the full-step sequence at moderate speeds.
A.	True
B.	False
Answer» C.

Discussion

1108.	In the frequency counter, a pulse shaper block is needed to ensure that the unknown signal, whose frequency is to be measured, will be compatible with the clock input for the counter block.
A.	True
B.	False
Answer» B. False

Discussion

1109.	In the digital clock project, the AHDL block codes are connected using graphic design files.
A.	True
B.	False
Answer» B. False

Discussion

1110.	In the keypad HDL encoder, the freeze bit detects when a key is released.
A.	True
B.	False
Answer» C.

Discussion

1111.	In the digital clock project, the ENT input and RCO output can be used for synchronous counter cascading.
A.	True
B.	False
Answer» B. False

Discussion

1112.	In the digital clock project, the 60 Hz signal is sent through a Schmitt-trigger circuit to produce sine wave pulses at the rate of 60 pps.
A.	True
B.	False
Answer» C.

Discussion

1113.	In a binary-weighted-input digital-to-analog converter, the values of the input resistors are chosen to be proportional to the binary weights of the corresponding input bits.
A.	True
B.	False
Answer» B. False

Discussion

1114.	A logic probe is placed on the input of a digital circuit and the probe lamp blinks slowly, indicating ________.
A.	that an open or bad logic level exists
B.	a high level output
C.	a high-frequency pulse train
D.	that the supply voltage is low
Answer» D. that the supply voltage is low

Discussion

1115.	A frequency counter is a circuit that can measure and display the frequency of a signal.
A.	True
B.	False
Answer» B. False

Discussion

1116.	What is the resolution, in percent, of a 12-bit DAC?
A.	8.33
B.	0.049
C.	0.000488
D.	0.083
Answer» C. 0.000488

Discussion

1117.	________ ADCs use no clock signal, because there is no timing or sequencing required.
A.	Actuator
B.	Dual
C.	Flash
D.	Bipolar
Answer» D. Bipolar

Discussion

1118.	Digital signal processing must be at least half as fast as the incoming signal to be processed.
A.	True
B.	False
Answer» C.

Discussion

1119.	The flash converter is the fastest analog-to-digital conversion method.
A.	True
B.	False
Answer» B. False

Discussion

1120.	The ADC0804 is an example of a successive-approximation ADC.
A.	True
B.	False
Answer» B. False

Discussion

1121.	What is unique about TTL devices such as the 74SXX?
A.	These devices use Schottky transistors and diodes to prevent them from going into saturation; this results in faster turn-on and turn-off times, which translates into higher frequency operation.
B.	The gate transistors are silicon (S), and the gates therefore have lower values of leakage current.
C.	The S denotes the fact that a single gate is present in the IC rather than the usual package of 2 6 gates.
D.	The S denotes a slow version of the device, which is a consequence of its higher power rating.
Answer» B. The gate transistors are silicon (S), and the gates therefore have lower values of leakage current.

Discussion

1122.	This program code will be executed continuously: STAT: MOV A, #01H JNZ STAT
A.	True
B.	False
Answer» B. False

Discussion

1123.	An ADC that compares each bit, one at a time, with the input analog signal is a ________.
A.	single-slope ramp converter
B.	dual-slope ramp converter
C.	successive-approximation converter
D.	tracking converter
Answer» D. tracking converter

Discussion

1124.	A monotonicity error in a DAC will show up as an incorrect analog output ________.
A.	only for higher value inputs
B.	only for lower value inputs
C.	only for certain (scattered) inputs
D.	for all inputs
Answer» D. for all inputs

Discussion

1125.	Digital signal processors must be programmed to perform specific tasks.
A.	True
B.	False
Answer» B. False

Discussion

1126.	The flash method of analog-to-digital conversion uses comparators that compare reference voltages with the analog input voltage.
A.	True
B.	False
Answer» B. False

Discussion

1127.	Offset is the characteristic of a DAC defined by the absence of any incorrect step reversals.
A.	True
B.	False
Answer» C.

Discussion

1128.	Digital filtering is faster than analog filtering.
A.	True
B.	False
Answer» C.

Discussion

1129.	Successive-approximation is perhaps the most widely used method of A/D conversion.
A.	True
B.	False
Answer» B. False

Discussion

1130.	The AND, OR, and TEST instructions are all part of which type of instruction?
A.	Data transfer
B.	Arithmetic
C.	Bit manipulation
D.	Loops and jumps
Answer» D. Loops and jumps

Discussion

1131.	A mini-program that can be used repeatedly, but is programmed only once is called a(n) ________.
A.	string
B.	subroutine
C.	interrupt
D.	processor control
Answer» C. interrupt

Discussion

1132.	Contiguous sequences of bytes or words are called ________.
A.	data transfer
B.	arithmetic
C.	loops and jumps
D.	strings
Answer» E.

Discussion

1133.	An interrupt method that requires the CPU to test each peripheral device in sequence is called ________.
A.	vectored I/O
B.	polled I/O
C.	programmed interrupt
D.	interrupt-driven I/O
Answer» C. programmed interrupt

Discussion

1134.	An example of a unidirectional bus in a microcomputer system is the ________.
A.	address bus
B.	data bus
C.	control bus
D.	all of the above
Answer» B. data bus

Discussion

1135.	A mnemonic is an English-like instruction that is converted by an assembler into a machine code for use by a processor.
A.	True
B.	False
Answer» B. False

Discussion

1136.	VHDL was created as a very flexible language and it allows us to define the operation of clocked devices in the code without relying on logic primitives.
A.	True
B.	False
Answer» B. False

Discussion

1137.	Chip designers are always trying to increase the clock speed.
A.	True
B.	False
Answer» B. False

Discussion

1138.	Instructions for the 80X86 family are downward compatible.
A.	True
B.	False
Answer» C.

Discussion

1139.	The Pentium can execute two instructions at once.
A.	True
B.	False
Answer» B. False

Discussion

1140.	A coprocessor is a microprocessor designed with a limited instruction set optimized to perform arithmetic operations very quickly.
A.	True
B.	False
Answer» B. False

Discussion

1141.	A(n) ________ one-shot starts a pulse in response to a trigger and will restart the internal pulse timer every time a subsequent trigger edge occurs before the pulse is complete.
A.	non-retriggerable
B.	retriggerable
C.	high-level triggered
D.	edge-triggered
Answer» C. high-level triggered

Discussion

1142.	ROMs retain data when the ________.
A.	power is off
B.	power is on
C.	system is down
D.	all of the above
Answer» E.

Discussion

1143.	Select the statement that best describes Read-Only Memory (ROM).
A.	nonvolatile, used to store information that changes during system operation
B.	nonvolatile, used to store information that does not change during system operation
C.	volatile, used to store information that changes during system operation
D.	volatile, used to store information that does not change during system operation
Answer» C. volatile, used to store information that changes during system operation

Discussion

1144.	The condition occurring when two or more devices try to write data to a bus simultaneously is called ________.
A.	address decoding
B.	bus contention
C.	bus collisions
D.	address multiplexing
Answer» C. bus collisions

Discussion

1145.	Address decoding for dynamic memory chip control may also be used for:
A.	controlling refresh circuits
B.	read and write control
C.	chip selection and address location
D.	memory mapping
Answer» D. memory mapping

Discussion

1146.	ROM access time is defined as ________.
A.	how long it takes to program the ROM chip
B.	being the difference between the READ and WRITE times
C.	the time it takes to get valid output data after a valid address is applied
D.	the time required to activate the address lines after the ENABLE line is at a valid level
Answer» D. the time required to activate the address lines after the ENABLE line is at a valid level

Discussion

1147.	The JTAG signals are named TDI, TDO, TMS, and TCK.
A.	True
B.	False
Answer» B. False

Discussion

1148.	An EPM 7128S in a ________ PQFP package has 12 I/O per LAB plus 4 additional input-only pins for a total of 100 pins.
A.	100-pin
B.	120-pin
C.	140-pin
D.	160-pin
Answer» E.

Discussion

1149.	Most PAL devices have a tristate buffer driving the input pins.
A.	True
B.	False
Answer» C.

Discussion

1150.	A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n):
A.	Ex-NOR gate
B.	OR gate
C.	Ex-OR gate
D.	NAND gate
Answer» D. NAND gate

Discussion

Explore topic-wise MCQs in Engineering.

In the frequency counter, the pulse width of the enable signal is very critical for taking an accurate frequency measurement.

In HDL when a circuit is simulated on a computer, the designer must create all the different scenarios that will be experienced by the actual circuit and must also know the proper response to those inputs.

In the keypad HDL encoder, after releasing a key the ring counter resumes its counting sequence.

The direct drive mode of a stepper motor allows for less control by the operator.

The full-step sequence always has two coils of the stepper motor energized in any state of the sequence and typically causes 30 of shaft rotation per step.

In the keypad HDL encoder, NANDing of the columns is used to activate the freeze bit.

The wave-drive sequence of a stepper motor has more torque and operates more smoothly than the full-step sequence at moderate speeds.

In the frequency counter, a pulse shaper block is needed to ensure that the unknown signal, whose frequency is to be measured, will be compatible with the clock input for the counter block.

In the digital clock project, the AHDL block codes are connected using graphic design files.

In the keypad HDL encoder, the freeze bit detects when a key is released.

In the digital clock project, the ENT input and RCO output can be used for synchronous counter cascading.

In the digital clock project, the 60 Hz signal is sent through a Schmitt-trigger circuit to produce sine wave pulses at the rate of 60 pps.

In a binary-weighted-input digital-to-analog converter, the values of the input resistors are chosen to be proportional to the binary weights of the corresponding input bits.

A logic probe is placed on the input of a digital circuit and the probe lamp blinks slowly, indicating ________.

A frequency counter is a circuit that can measure and display the frequency of a signal.

What is the resolution, in percent, of a 12-bit DAC?

________ ADCs use no clock signal, because there is no timing or sequencing required.

Digital signal processing must be at least half as fast as the incoming signal to be processed.

The flash converter is the fastest analog-to-digital conversion method.

The ADC0804 is an example of a successive-approximation ADC.

What is unique about TTL devices such as the 74SXX?

This program code will be executed continuously: STAT: MOV A, #01H JNZ STAT

An ADC that compares each bit, one at a time, with the input analog signal is a ________.

A monotonicity error in a DAC will show up as an incorrect analog output ________.

Digital signal processors must be programmed to perform specific tasks.

The flash method of analog-to-digital conversion uses comparators that compare reference voltages with the analog input voltage.

Offset is the characteristic of a DAC defined by the absence of any incorrect step reversals.

Digital filtering is faster than analog filtering.

Successive-approximation is perhaps the most widely used method of A/D conversion.

The AND, OR, and TEST instructions are all part of which type of instruction?

A mini-program that can be used repeatedly, but is programmed only once is called a(n) ________.

Contiguous sequences of bytes or words are called ________.

An interrupt method that requires the CPU to test each peripheral device in sequence is called ________.

An example of a unidirectional bus in a microcomputer system is the ________.

A mnemonic is an English-like instruction that is converted by an assembler into a machine code for use by a processor.

VHDL was created as a very flexible language and it allows us to define the operation of clocked devices in the code without relying on logic primitives.

Chip designers are always trying to increase the clock speed.

Instructions for the 80X86 family are downward compatible.

The Pentium can execute two instructions at once.

A coprocessor is a microprocessor designed with a limited instruction set optimized to perform arithmetic operations very quickly.

A(n) ________ one-shot starts a pulse in response to a trigger and will restart the internal pulse timer every time a subsequent trigger edge occurs before the pulse is complete.

ROMs retain data when the ________.

Select the statement that best describes Read-Only Memory (ROM).

The condition occurring when two or more devices try to write data to a bus simultaneously is called ________.

Address decoding for dynamic memory chip control may also be used for:

ROM access time is defined as ________.

The JTAG signals are named TDI, TDO, TMS, and TCK.

An EPM 7128S in a ________ PQFP package has 12 I/O per LAB plus 4 additional input-only pins for a total of 100 pins.

Most PAL devices have a tristate buffer driving the input pins.

A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n):