MCQOPTIONS
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MCQOPTIONS
This section includes 103 Mcqs, each offering curated multiple-choice questions to sharpen your Electrical Engineering knowledge and support exam preparation. Choose a topic below to get started.
| 51. |
The following switching functions are to be implemented using a decoder f1 = ∑m (1, 2, 4, 8, 10, 14)f2 = ∑m (2, 5, 9, 15)f3 = ∑m (2, 4, 5, 6, 7) The minimum configuration of decoder is |
| A. | 2 to 4 line |
| B. | 3 to 8 line |
| C. | 4 to 16 line |
| D. | 5 to 32 line |
| Answer» D. 5 to 32 line | |
| 52. |
An n bit ADC using Vr as reference has a resolution (in volts) of |
| A. | [A]. |
| B. | Vr(n) |
| C. | [C]. |
| D. | 2Vr(n) |
| Answer» D. 2Vr(n) | |
| 53. |
The expression Y (A, B, C) = ∑m (1, 3, 5, 6) is to realized using a multiplexer. Then |
| A. | use 8 : 1 multiplexer and ground input lines 1, 3, 5, 6 |
| B. | use 8 : 1 multiplexer and ground input lines 0, 2, 4, 7 |
| C. | use 8 : 1 multiplexer and ground input lines 0, 1, 2, 3 |
| D. | use 8 : 1 multiplexer and ground input lines 4, 5, 6, 7 |
| Answer» C. use 8 : 1 multiplexer and ground input lines 0, 1, 2, 3 | |
| 54. |
A B C D + AB C D = |
| A. | ABC |
| B. | ABCD |
| C. | A B D |
| D. | ABCD |
| Answer» D. ABCD | |
| 55. |
The inputs A and B of the given figure are applied to a two input NOR gate. The output waveform is |
| A. | [A]. |
| B. | [B]. |
| C. | [C]. |
| D. | [D]. |
| Answer» C. [C]. | |
| 56. |
The inputs A, B, C of the given figure are applied to a 3 input NOR gate. The output is |
| A. | HIGH from 4 to 0 |
| B. | LOW from 0 to 4 |
| C. | HIGH from 0 to 1 and LOW from 1 to 4 |
| D. | LOW from 0 to 2 and HIGH from 2 to 4 |
| Answer» D. LOW from 0 to 2 and HIGH from 2 to 4 | |
| 57. |
Which of the following is coincidence logic circuit? |
| A. | [A]. |
| B. | [B]. |
| C. | [C]. |
| D. | [D]. |
| Answer» B. [B]. | |
| 58. |
The minimized version of logic circuit in the given figure is |
| A. | [A]. |
| B. | [B]. |
| C. | [C]. |
| D. | [D]. |
| Answer» B. [B]. | |
| 59. |
The counter shown in the given figure is |
| A. | Synchronous |
| B. | Johnson |
| C. | Ring |
| D. | None of the above |
| Answer» E. | |
| 60. |
If number of bits is N, the % resolution in analog to digital conversion is |
| A. | [A]. |
| B. | [B]. |
| C. | [C]. |
| D. | [D]. |
| Answer» D. [D]. | |
| 61. |
A counter has 4 flip flops. It divides the input frequency by |
| A. | 4 |
| B. | 2 |
| C. | 8 |
| D. | 16 |
| Answer» E. | |
| 62. |
For the minterm designation Y = ∑ m (1, 3, 5, 7) the complete expression is |
| A. | Y = A BC + A B C |
| B. | Y = A B C + A B C + ABC + A BC |
| C. | Y = A B C + A B C + ABC + A BC |
| D. | Y = A B C + ABC + A BC + A BC |
| Answer» C. Y = A B C + A B C + ABC + A BC | |
| 63. |
In a 3 input NAND gate, the number of states in which output is 0 equals |
| A. | 8 |
| B. | 1 |
| C. | 6 |
| D. | 5 |
| Answer» C. 6 | |
| 64. |
Which of the following gate is a two-level logic gate |
| A. | R gate |
| B. | AND gate |
| C. | XCLUSIVE OR gate |
| D. | OT gate |
| Answer» D. OT gate | |
| 65. |
The only function of NOT gate is to ___________. |
| A. | top signal |
| B. | nvert input signal |
| C. | ct as a universal gate |
| D. | one of the above |
| Answer» C. ct as a universal gate | |
| 66. |
The number 10000 would appear just immediately after |
| A. | FFF (hex) |
| B. | 111 (binary) |
| C. | 777 (octal) |
| D. | ll of the above |
| Answer» E. | |
| 67. |
Excess-3 code is known as |
| A. | eighted code |
| B. | yclic redundancy code |
| C. | elf-complementing code |
| D. | lgebraic code |
| Answer» D. lgebraic code | |
| 68. |
Consider the representation of six-bit numbers by two’s complement, one’s complement, or by sign and magnitude: In which representation is there overflow from the addition of the integers 011000 and 011000? |
| A. | wo’s complement only |
| B. | ign and magnitude and one’s complement only |
| C. | wo’s complement and one’s complement only |
| D. | ll three representations |
| Answer» E. | |
| 69. |
Digital computers are more widely used as compared to analog computers, because they are |
| A. | ess expensive |
| B. | lways more accurate and faster |
| C. | seful over wider ranges of problem types |
| D. | asier to maintain |
| Answer» D. asier to maintain | |
| 70. |
The inputs of a NAND gate are connected together. The resulting circuit is ___________. |
| A. | R gate |
| B. | ND gate |
| C. | OT gate |
| D. | one of the above |
| Answer» D. one of the above | |
| 71. |
Which is the correct order of sequence for representing the input values in K-map? |
| A. | 00, 01, 10, 11) |
| B. | 00, 10, 01, 11) |
| C. | 00, 01, 11, 10) |
| D. | 00, 10, 11, 01) |
| Answer» D. 00, 10, 11, 01) | |
| 72. |
NAND. gates are preferred over others because these |
| A. | ave lower fabrication area |
| B. | an be used to make any gate |
| C. | onsume least electronic power |
| D. | rovide maximum density in a chip. |
| Answer» C. onsume least electronic power | |
| 73. |
Storage of 1 KB means the following number of bytes |
| A. | 000 |
| B. | 64 |
| C. | 024 |
| D. | 064 |
| Answer» D. 064 | |
| 74. |
The binary code of (21.125)10 is |
| A. | 0101.001 |
| B. | 0100.001 |
| C. | 0101.010 |
| D. | 0100.111 |
| Answer» B. 0100.001 | |
| 75. |
A hexadecimal odometer displays F 52 F. The next reading will be |
| A. | 52E |
| B. | 52F |
| C. | 53F |
| D. | 53O |
| Answer» E. | |
| 76. |
In Boolean algebra, the bar sign (-) indicates ___________. |
| A. | R operation |
| B. | ND operation |
| C. | OT operation |
| D. | one of the above |
| Answer» D. one of the above | |
| 77. |
The NOR gate is OR gate followed by ___________. |
| A. | ND gate |
| B. | AND gate |
| C. | OT gate |
| D. | one of the above |
| Answer» D. one of the above | |
| 78. |
Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins? |
| A. | LCC |
| B. | FP |
| C. | GA |
| D. | GA |
| Answer» E. | |
| 79. |
An AND gate will function as OR if |
| A. | ll the inputs to the gates are “1” |
| B. | ll the inputs are ‘0’ |
| C. | ither of the inputs is “1” |
| D. | ll the inputs and outputs are complemente' |
| Answer» E. | |
| 80. |
Assuming 8 bits for data, 1 bit for parity, I start bit and 2 stop bits, the number of characters that 1200 BPS communication line can transmit is. |
| A. | 0 CPS |
| B. | 20 CPS |
| C. | 2 CPS |
| D. | one of the above |
| Answer» D. one of the above | |
| 81. |
What is/are the configurable functions of each and every IOBs connected around the FPGA device from the operational point of view? |
| A. | nput operation |
| B. | ristate output operation |
| C. | i-directional I/O pin access |
| D. | ll of the above |
| Answer» E. | |
| 82. |
Most of the digital computers do not have floating point hardware because |
| A. | loating point hardware is costly |
| B. | t is slower than software |
| C. | t is not possible to perform floating point addition by hardware |
| D. | f no specific reason |
| Answer» B. t is slower than software | |
| 83. |
The inverter is ___________ |
| A. | OT gate |
| B. | R gate |
| C. | ND gate |
| D. | one of the above |
| Answer» B. R gate | |
| 84. |
A debouncing circuit is |
| A. | n astable MV |
| B. | bistable MV |
| C. | latch |
| D. | monostable MV |
| Answer» D. monostable MV | |
| 85. |
Digital circuit can be made by the repeated use of ___________ |
| A. | R gates |
| B. | OT gates |
| C. | AND gates |
| D. | one of the above |
| Answer» D. one of the above | |
| 86. |
Positive logic in a logic circuit is one in which |
| A. | ogic 0 and 1 are represented by 0 and positive voltage respectively |
| B. | ogic 0 and, -1 are represented by negative and positive voltages respectively |
| C. | ogic 0 voltage level is higher than logic 1 voltage level |
| D. | ogic 0 voltage level is lower than logic 1 voltage level. |
| Answer» E. | |
| 87. |
Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits? |
| A. | tate Reduction |
| B. | tate Minimization |
| C. | tate Assignment |
| D. | tate Evaluation |
| Answer» D. tate Evaluation | |
| 88. |
In case of OR gate, no matter what the number of inputs, a |
| A. | at any input causes the output to be at logic 1 |
| B. | at any input causes the output to be at logic 0 |
| C. | any input causes the output to be at logic 0 |
| D. | at any input causes the output to be at logic 1. |
| Answer» B. at any input causes the output to be at logic 0 | |
| 89. |
In which of the following base systems is 123 not a valid number? |
| A. | ase 10 |
| B. | ase 16 |
| C. | ase 8 |
| D. | ase 3 |
| Answer» E. | |
| 90. |
The universal gate is ___________ |
| A. | AND gate |
| B. | R gate |
| C. | ND gate |
| D. | one of the above |
| Answer» B. R gate | |
| 91. |
When a CPU is interrupted, it |
| A. | Stops execution of instructions |
| B. | Acknowledges interrupt and branches of subroutine |
| C. | Acknowledges interrupt and continues |
| D. | Acknowledges interrupt and waits for the next instruction from the interrupting device. |
| Answer» C. Acknowledges interrupt and continues | |
| 92. |
A dynamic RAM consists of |
| A. | 6 Transistors |
| B. | 2 Transistors and 2 Capacitors |
| C. | 1 Transistor and 1 Capacitor |
| D. | 2 Capacitor only |
| Answer» D. 2 Capacitor only | |
| 93. |
A PLA can be used |
| A. | As a microprocessor |
| B. | As a dynamic memory |
| C. | To realise a sequential logic |
| D. | To realise a combinational logic |
| Answer» E. | |
| 94. |
The output of a logic gate is ‘1’ when all its inputs are at logic ‘0’. Then gate is either |
| A. | A NAND or an EX-OR gate |
| B. | A NOR or an EX-NOR gate |
| C. | An OR or a EX-NOR gate |
| D. | An AND or an Ex-OR gate |
| Answer» C. An OR or a EX-NOR gate | |
| 95. |
What are the minimum number of 2 to 1 multiplexers required to generate a 2 input AND gate and a 2 input Ex-OR gate? |
| A. | 1 and 2 |
| B. | 1 and 3 |
| C. | 1 and 1 |
| D. | 2 and 2 |
| Answer» B. 1 and 3 | |
| 96. |
For a 10-bit DAC, the Resolution is defined by which of the following |
| A. | 1024 |
| B. | 1/1024 |
| C. | 10 |
| D. | None |
| Answer» C. 10 | |
| 97. |
Hysteresis is desirable in Schmitt-trigger, because |
| A. | Energy is to be stored/discharged in parasitic capacitance |
| B. | Effects of temperature would be compensated |
| C. | Devices in the circuit should be allowed time for saturation and desaturation |
| D. | It would prevent noise from causing false triggering |
| Answer» D. It would prevent noise from causing false triggering | |
| 98. |
In a full-wave rectifier without filter, the ripple factor is |
| A. | 0.482 |
| B. | 1.21 |
| C. | 1.79 |
| D. | 2.05 |
| Answer» B. 1.21 | |
| 99. |
When a step input is given to an op-amp integrator, the output will be |
| A. | a ramp |
| B. | a sinusoidal wave |
| C. | a rectangular wave |
| D. | a triangular wave with dc bias |
| Answer» B. a sinusoidal wave | |
| 100. |
For a large values of |VDS|, a FET behave as |
| A. | Voltage controlled resistor |
| B. | Current controlled current source |
| C. | Voltage controlled current source |
| D. | Current controlled resistor |
| Answer» D. Current controlled resistor | |