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This section includes 1271 Mcqs, each offering curated multiple-choice questions to sharpen your Electronics & Communication Engineering knowledge and support exam preparation. Choose a topic below to get started.
| 201. |
In a synchronous counter all flip flops are clocked together. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 202. |
(100101)2 is |
| A. | (37)10 |
| B. | (69)10 |
| C. | (41)10 |
| D. | (5)10 |
| Answer» B. (69)10 | |
| 203. |
Out of S, R, J, K, Preset, Clear inputs to flip flops, the synchronous inputs are |
| A. | S, R, J, K only |
| B. | S, R, Preset, Clear only |
| C. | Preset, Clear only |
| D. | S, R only |
| Answer» B. S, R, Preset, Clear only | |
| 204. |
A counter displays a sequence of numbers. If a reading corresponds to the hexadecimal number F52E, the next two readings are respectively |
| A. | F52F, F520 |
| B. | F530, F531 |
| C. | F52F, F530 |
| D. | F52F, F52G |
| Answer» D. F52F, F52G | |
| 205. |
The number of cells in a 4 variable K map is |
| A. | 4 |
| B. | 32 |
| Answer» B. 32 | |
| 206. |
The circuit shown below is functionally equivalent to |
| A. | NOR gate |
| B. | OR gate |
| C. | EX-OR gate |
| D. | NAND gate |
| Answer» D. NAND gate | |
| 207. |
The density of the dynamic RAM is |
| A. | more than that of static RAM |
| B. | less than that of static RAM |
| C. | equal to that to static RAM |
| D. | equal to or more than that of static RAM |
| Answer» B. less than that of static RAM | |
| 208. |
The number of accumulators in 6800 are |
| A. | 2 |
| B. | 3 |
| C. | 1 |
| D. | 4 |
| Answer» B. 3 | |
| 209. |
Which of the following input is not possible in case of a SR flip-flop? |
| A. | S = 0, R = 0 |
| B. | S = 0, R = 1 |
| C. | S = 1, R = 0 |
| D. | S = 1, R = 1 |
| Answer» E. | |
| 210. |
IC counters are |
| A. | synchronous only |
| B. | asynchronous only |
| C. | both synchronous and asynchronous |
| D. | none of the above |
| Answer» D. none of the above | |
| 211. |
Using the same flip flops |
| A. | a synchronous flip flop can operate at higher frequency than ripple counter |
| B. | a ripple counter can operate at higher frequency than synchronous counter |
| C. | both ripple and synchronous counter can operate at the same frequency |
| D. | can not determine |
| Answer» B. a ripple counter can operate at higher frequency than synchronous counter | |
| 212. |
The values of 25 in octal system is |
| A. | 40 |
| B. | 20 |
| C. | 400 |
| D. | 200 |
| Answer» B. 20 | |
| 213. |
Decade counter has 4 flip flops and skips states 10 to 15. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 214. |
A buffer is |
| A. | always non-inverting |
| B. | always inverting |
| C. | inverting or non-inverting |
| D. | none of the above |
| Answer» D. none of the above | |
| 215. |
Assertion (A): A presettable counter can be preset to any desired starting pointReason (R): The maximum frequency of a ripple counter depends on the modulus. |
| A. | A is true, R is false |
| B. | A is false, R is true |
| Answer» C. | |
| 216. |
Which of the following subtraction operations do not result in F16? (BA)16 - (AB)16 (BC)16 - (CB)16(CB)16 - (BC)16(CB)16 - (BC)16 Select the correct answer |
| A. | 1 and 2 |
| B. | 1 and 3 |
| C. | 2 and 3 |
| D. | 1, 2 and 3 |
| Answer» B. 1 and 3 | |
| 217. |
DeMorgan's first theorem is = |
| A. | A . A = 0 |
| B. | A = A |
| C. | A + B = A . B |
| D. | AB = A + B |
| Answer» D. AB = A + B | |
| 218. |
Which of them radiates emission? |
| A. | LED only |
| B. | LCD only |
| C. | Both LED and LCD |
| D. | Neither LED nor LCD |
| Answer» B. LCD only | |
| 219. |
Wired AND connection can be used in TTL with totem pole output. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 220. |
In 2 out of 5 code, decimal number 8 is |
| A. | 11000 |
| B. | 10100 |
| C. | 11000 |
| D. | 1010 |
| Answer» C. 11000 | |
| 221. |
718 = __________ . |
| A. | 1110002 |
| B. | 1110012 |
| C. | 1000012 |
| D. | 1100012 |
| Answer» C. 1000012 | |
| 222. |
In 8085 microprocessor, a RIM instruction is used to |
| A. | disable the interrupts 7.5, 6.5, 5.5 |
| B. | enable the interrupts 7.5, 6.5, 5.5 |
| C. | read in the serial input data |
| D. | none of the above |
| Answer» D. none of the above | |
| 223. |
The difference between sequential and combinational circuits is |
| A. | Combinational circuits store bits |
| B. | Combinational circuits have memory |
| C. | Sequential circuits store bits |
| D. | Sequential circuits have memory |
| Answer» E. | |
| 224. |
A half adder adds __________ bits and a full adder adds __________ bits. |
| A. | two, three |
| B. | three, four |
| C. | four, six |
| D. | two, four |
| Answer» B. three, four | |
| 225. |
In digital computer programming, subroutines are used |
| A. | to reduce program execution time at the expense of more memory |
| B. | to reduce storage requirements |
| C. | to increase programming ease and reduce storage requirements |
| D. | because most of the functions are same |
| Answer» D. because most of the functions are same | |
| 226. |
In 8421 Binary coded Decimal system the decimal number 237 is represented by |
| A. | 1000110111 |
| B. | 1000111110 |
| C. | 1000110111 |
| D. | 10010010011 |
| Answer» D. 10010010011 | |
| 227. |
For a particular type of memory the access time and cycle time are 200 ns each. The maximum rate at which data can be accessed by |
| A. | 2.5 x 106/s |
| B. | 5 x 106/s |
| C. | 0.2 x l06/s |
| D. | 106/s |
| Answer» B. 5 x 106/s | |
| 228. |
A shift register can be used for all of the following EXCEPT |
| A. | ring counter |
| B. | A/D conversion |
| C. | series to parallel conversion |
| D. | generation of delay |
| Answer» C. series to parallel conversion | |
| 229. |
In the circuit of the given figure, V0 = |
| A. | 5 V |
| B. | 3.1 V |
| C. | 2.5 V |
| D. | 0 |
| Answer» B. 3.1 V | |
| 230. |
Typical size of digital IC is about |
| A. | 1″ x 1″ |
| B. | 2″ x 2″ |
| C. | 0.1″ x 0.1″ |
| D. | 0.001″ x 0.001″ |
| Answer» D. 0.001‚Ä≥ x 0.001‚Ä≥ | |
| 231. |
In the given figure A = 1, B = 1. B is now changed to a sequence 101010................The outputs X and Y will be |
| A. | fixed at 0 and 1 respectively |
| B. | X = 1010.......and Y = 0101........ |
| C. | X = 1010..........and Y = 1010 |
| D. | fixed at 1 and 0 respectively. |
| Answer» B. X = 1010.......and Y = 0101........ | |
| 232. |
Assertion (A): A demultiplexer cannot be used as a decoder Reason (R): A multiplexer selects one of many outputs whereas a decoder selects on output corresponding to coded input. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» E. | |
| 233. |
How many lines are there in address bus of 8085 μp? |
| A. | 6 |
| B. | 8 |
| C. | 12 |
| D. | 16 |
| Answer» E. | |
| 234. |
Using 2's complement, the largest positive and negative number which can be stored with 8 bits are |
| A. | +128 and -127 |
| B. | +128 and -128 |
| C. | +127 and -128 |
| D. | +127 and -127 |
| Answer» D. +127 and -127 | |
| 235. |
A Charge Couple Device (CCD) is a |
| A. | content addressable memory |
| B. | read only memory |
| C. | R is low and S is high |
| D. | R and S are high |
| Answer» C. R is low and S is high | |
| 236. |
The Boolean expression Y = (A + B + AB) C then Y will be equal to |
| A. | AC |
| B. | BC |
| C. | C |
| D. | none |
| Answer» D. none | |
| 237. |
Consider the following statements: In the 2's complement representation, negative numbers are stored in sign magnitude form.Taking 2's complement is equivalent to sign change.In a 4 bit complement representation of a binary number A.In the 2's complement representation the most significant bit (MSB) is zero for a positive number. Of these, the only true statements are |
| A. | (I) and (III) |
| B. | (I) and (IV) |
| C. | (II) and (III) |
| D. | (II) and (IV) |
| Answer» E. | |
| 238. |
For a Mod-64 synchronous counter the number of flip flops and AND gates needed is |
| A. | 6 and 4 respectively |
| B. | 4 and 6 respectively |
| C. | 7 and 5 respectively |
| D. | 5 and 7 respectively |
| Answer» B. 4 and 6 respectively | |
| 239. |
The function Y = A B C + AB C + A B C + A BC is to be realized using discrete gates. The inputs available are A, B, C. We need a total of |
| A. | 8 gates |
| B. | 6 gates |
| C. | 10 gates |
| D. | 5 gates |
| Answer» B. 6 gates | |
| 240. |
Which of the following flip flops cannot be converted to D flip flop? |
| A. | JK |
| B. | SR |
| C. | Master slave |
| D. | None of the above |
| Answer» E. | |
| 241. |
Which one of the following is a D to A conversion technique? |
| A. | Successive approximation |
| B. | Weighted resistor |
| C. | Dual slope |
| D. | Single slope |
| Answer» C. Dual slope | |
| 242. |
The stack is a specialized temporary __________ access memory during __________ and __________ instructions.The 8156 of a figure has RAM locations from 2000 H to 20 FFH. |
| A. | random, store, load |
| B. | random, push, load |
| C. | sequential, store, pop |
| D. | sequential, push, pop |
| Answer» E. | |
| 243. |
What is the maximum output voltage from the 741 op-amp? |
| A. | Zero |
| B. | Approximately 1 V |
| C. | Approximately 3 V |
| D. | Approximately 5 V |
| Answer» E. | |
| 244. |
A 12 bit ADC is employed to convert an analog voltage of zero to 10 volts. The resolution of the ADC is |
| A. | 2.44 mV |
| B. | 24.4 mV |
| C. | 83.3 mV |
| D. | 1.2 V |
| Answer» B. 24.4 mV | |
| 245. |
What is the direction of address bus? |
| A. | Unidirectional into μp |
| B. | Unidirection out of μp |
| C. | Bidirectional |
| D. | Mixed direction, i.e., some lines into up and some others out of μp |
| Answer» C. Bidirectional | |
| 246. |
The value of 25 in octal system is |
| A. | 40 |
| B. | 20 |
| C. | 100 |
| D. | 200 |
| Answer» B. 20 | |
| 247. |
Assuming accumulator contain A 64 and the carry is set (1). What will register A and (CY) contain after XRA A? |
| A. | A 6 H, 1 |
| B. | A 6 H, 0 |
| C. | 00 H, 0 |
| D. | 00 H, 1 |
| Answer» D. 00 H, 1 | |
| 248. |
In floating point representation, the number of bits of mantissa is |
| A. | 10 |
| B. | 9 |
| C. | 8 |
| D. | 7 |
| Answer» B. 9 | |
| 249. |
If an inverter is placed at the input to an SR flip-flop, the result is |
| A. | T flip-flop |
| B. | D flip-flop |
| C. | JK flip-flop |
| D. | BCD decade counter |
| Answer» C. JK flip-flop | |
| 250. |
An AND gate has four inputs. One of the inputs is low and other inputs are high. The output |
| A. | is low |
| B. | is high |
| C. | is alternately low and high |
| D. | may be high or low depending on relative magnitudes of inputs |
| Answer» B. is high | |