Explore topic-wise MCQs in Digital Electronics.

This section includes 97 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Electronics knowledge and support exam preparation. Choose a topic below to get started.

51.

Negation is represented by the sign of

A. small circle
B. large square
C. large triangle
D. small triangle
Answer» B. large square
52.

The symbol Π represents a

A. Adder
B. Ripple counter
C. Multiplier
D. None
Answer» E.
53.

Active low inputs or outputs are

A. pulse indicators
B. edge indicators
C. polarity indicators
D. clock indicators
Answer» D. clock indicators
54.

According to the ANSI standard the carry output is designated by

A. CI
B. CO
C. CP
D. CT
Answer» C. CP
55.

Addition is symbolized by the sign of

A. summation
B. integral
C. differentiation
D. subtraction
Answer» B. integral
56.

The symbol for AND gate is

A. plus
B. minus
C. ampersand
D. dollar
Answer» D. dollar
57.

Symbol for multiplexer is

A. MUL
B. MULL
C. MUX
D. MUXX
Answer» D. MUXX
58.

2 to 4 line decoder will have

A. 2enables
B. 3enables
C. 4enables
D. 8enables
Answer» B. 3enables
59.

Converting code X to code Y is represented by the symbol of

A. X+Y
B. X-Y
C. X*Y
D. X/Y
Answer» E.
60.

A Schmitt trigger has a positive feedback circuit and experiences a phenomenon called hysteresis.

A. 1
B.
Answer» C.
61.

A series RC circuit can be used to generate a power-up (automatic) reset signal.

A. 1
B.
Answer» B.
62.

The term race condition describes the time that an active signal must be present at the input to a flip-flop before an active clock edge is applied.

A. 1
B.
Answer» C.
63.

The 7805 will get very hot if your circuit draws more than 0.5 A.

A. 1
B.
Answer» B.
64.

The main concern when using a pull-down resistor is:

A. the low power dissipation of the resistor
B. it will keep a floating terminal LOW
C. the high power dissipation of the resistor
D. it will cause false triggering
Answer» D. it will cause false triggering
65.

Why does the data sheet for the 7476 only give a minimum value for the clock pulse width (both HIGH and LOW)?

A. nominal value
B. best-case condition
C. worst-case condition
Answer» D.
66.

Which of the following flip-flop timing parameters indicates the time it takes a Q output to respond to a Cp input?

A. ts, th
B. tPHL, tPLH
C. tw (L), tw (H)
D. fmax
Answer» C. tw (L), tw (H)
67.

The output of a phototransister is determined by the presence or absence of light at its base input.

A. 1
B.
C. 1
D.
Answer» B.
68.

Pull-up resistors and pull-down resistors are used to keep a floating terminal HIGH.

A. 1
B.
Answer» C.
69.

The purpose of a pull-up resistor is to keep a terminal at a ________ level when it would normally be at a ________ level.

A. LOW, float
B. HIGH, float
C. clock, float
D. pulsed, float
Answer» C. clock, float
70.

Is the propagation delay from the clock to the output for the 7476 the same as the delay from the set or reset to the output?

A. yes
B. no
Answer» B. no
71.

Decoupling capacitors should be tied from VCC on one device to ground on a different device.

A. 1
B.
Answer» C.
72.

In the automatic reset circuit for a flip-flop, how long does it take the capacitor to completely charge?

A. 1 time constant (RC)
B. 2 time constants (RC)
C. 5 time constants (RC)
D. 10 time constants (RC)
Answer» D. 10 time constants (RC)
73.

Setup time specifies:

A. the minimum time the control levels need to be maintained on the inputs prior to the triggering edge of the clock in order to be reliably clocked into the flip-flop
B. the maximum time interval required for the control levels to remain on the inputs before the triggered edge of the clock in order for the data to be reliably clocked out of the flip-flop
C. how long the operator has to get the flip-flop running before the maximum power level is exceeded
D. how long it takes the output to change states after the clock has transitioned
Answer» B. the maximum time interval required for the control levels to remain on the inputs before the triggered edge of the clock in order for the data to be reliably clocked out of the flip-flop
74.

The input levels to a flip-flop must be maintained for a minimum time period both before and after the edge of the clock signal is applied.

A. 1
B.
Answer» B.
75.

A Schmitt trigger:

A. has two trip points
B. is a zero crossing detector
C. has positive feedback
D. has two trip points and positive feedback
Answer» E.
76.

Define a race condition for a flip-flop.

A. The inputs to a trigger device are changing slightly before the active trigger edge.
B. The inputs to a trigger device are changing slightly after the active trigger edge.
C. The inputs to a trigger device are changing at the same time as the active trigger edge.
Answer» D.
77.

There is no way to eliminate the effects of a switch bounce.

A. 1
B.
Answer» C.
78.

One example for the use of a Schmitt trigger is as a(n):

A. switch debouncer
B. racer
C. astable oscillator
D. transition pulse generator
Answer» B. racer
79.

Look up the propagation delay from the clock to the output for the 7476. Are the HIGH-to-LOW and LOW-to-HIGH propagation delays the same?

A. yes
B. no, tPLH = 25 ns, tPHL = 40 ns
C. no, tPLH = 40 ns, tPHL = 25 ns
D. no, tPHL = 25 ns, tPLH = 40 ns
Answer» C. no, tPLH = 40 ns, tPHL = 25 ns
80.

How much setup time (ts) is required for the 74LS76?

A. 5 ns
B. 10 ns
C. 20 ns
D. 40 ns
Answer» D. 40 ns
81.

Why should a LED be pulled LOW from a logic gate rather than pulled HIGH?

A. LOW-level current is smaller.
B. LOW-level current is larger.
C. HIGH-level current is larger.
D. LOW-level current is smaller and HIGH-level current is larger.
Answer» C. HIGH-level current is larger.
82.

Can the automatic RC circuit be used to set a flip-flop rather than reset the flip-flop?

A. yes
B. no
Answer» B. no
83.

When the inputs to a flip-flop are changing at the same time that the active trigger edge of the input clock is making its transition, this condition is called:

A. racing
B. toggling
C. slave loading
D. pulse timing
Answer» B. toggling
84.

A transfer function graph illustrates the most important specifications for the Schmitt trigger devices.

A. 1
B.
Answer» B.
85.

The output of a standard TTL NAND gate is used to pull an LED indicator LOW. The LED is in series with a 470- resistor. What is the current in the circuit when the LED is on?

A. 7.02 mA
B. 8.51 mA
C. 10.63 mA
D. 5.32 mA
Answer» B. 8.51 mA
86.

Why is the Schmitt trigger needed in the 60-Hz TTL-level clock pulse generator?

A. to provide a triangle wave
B. to provide a sine wave
C. to provide a rounded pulse waveform
D. to provide a sharp pulse waveform
Answer» E.
87.

Which of the following circuit parameters would be most likely to limit the maximum operating frequency of a flip-flop?

A. setup and hold time
B. clock pulse HIGH and LOW time
C. propagation delay time
D. clock transition time
Answer» D. clock transition time
88.

A settable flip-flop's normal starting state when power is first applied to a circuit is always the ________ state.

A. reset
B. set
C. toggle
D. dual
Answer» C. toggle
89.

What would be the output voltage of a 7814 voltage regulator?

A. –14 V dc
B. +14 V dc
C. –8 V dc
D. +8 V dc
Answer» C. ‚Äì8 V dc
90.

TTL requires a constant supply voltage of 8.0 V.

A. 1
B.
C. 1
D.
Answer» C. 1
91.

An optocoupler is an integrated circuit with an LED and a zener diode encased in the same package.

A. 1
B.
Answer» C.
92.

A 0.01-F capacitor is recommended by TTL manufacturers for ________ the power supply.

A. decoupling
B. filtering
C. rectifying
D. grounding
Answer» B. filtering
93.

What is the major advantage of the J-K flip-flop over the S-R flip-flop?

A. The J-K flip-flop is much faster.
B. The J-K flip-flop does not have propagation delay problems.
C. The J-K flip-flop has a toggle state.
D. The J-K flip-flop has two outputs.
Answer» D. The J-K flip-flop has two outputs.
94.

A Schmitt trigger has VT+ = 2.0 V and VT– = 1.2 V. What is the hysteresis voltage of the Schmitt trigger?

A. 0.4 volt
B. 0.6 volt
C. 0.8 volt
D. 1.2 volts
Answer» D. 1.2 volts
95.

Why would a delay gate be needed for a digital circuit?

A. A delay gate is never needed.
B. to provide for setup times
C. to provide for hold times
D. to provide for setup times and hold times
Answer» E.
96.

What is the difference between setup time and hold time?

A. Setup time occurs after the active clock edge, hold time occurs before the active clock edge.
B. Setup time occurs before the active clock edge, hold time occurs after the active clock edge.
C. Setup time and hold time both occur at the active clock edge.
D. The inputs to a trigger device are changing slightly before the active trigger edge.
Answer» C. Setup time and hold time both occur at the active clock edge.
97.

The ________ circuit overcomes the problem of switching caused by jitter on the inputs.

A. astable multivibrator
B. monostable multivibrator
C. bistable multivibrator
D. Schmitt trigger
Answer» E.