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This section includes 65 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Electronics knowledge and support exam preparation. Choose a topic below to get started.
| 51. |
The expressions, , are equivalent. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 52. |
For a three-input AND gate, with the input waveforms as shown below, which output waveform is correct? |
| A. | a |
| B. | b |
| C. | c |
| D. | d |
| Answer» D. d | |
| 53. |
Which step in this reduction process is using DeMorgan's theorem? |
| A. | STEP 1 |
| B. | STEP 2 |
| C. | STEP 3 |
| D. | STEP 4 |
| Answer» B. STEP 2 | |
| 54. |
For a 3-input NAND gate, with the input waveforms as shown below, which output waveform is correct? |
| A. | a |
| B. | b |
| C. | c |
| D. | d |
| Answer» D. d | |
| 55. |
Which of the examples below expresses the distributive law? |
| A. | (A + B) + C = A + (B + C) |
| B. | A(B + C) = AB + AC |
| C. | A + (B + C) = AB + AC |
| D. | A(BC) = (AB) + C |
| Answer» C. A + (B + C) = AB + AC | |
| 56. |
A small circle on the output of a logic gate is used to represent the: |
| A. | Comparator operation. |
| B. | OR operation. |
| C. | NOT operation. |
| D. | AND operation. |
| Answer» D. AND operation. | |
| 57. |
The logic gate that will have HIGH or "1" at its output when any one of its inputs is HIGH is a(n): |
| A. | NOR gate |
| B. | OR gate |
| C. | AND gate |
| D. | NOT operation |
| Answer» C. AND gate | |
| 58. |
What is the basic difference between AHDL and VHDL? |
| A. | ADHL is used in all PLD's. |
| B. | VHDL is used in all PLD's. |
| C. | ADHL is proprietary. |
| D. | VHDL is proprietary. |
| Answer» D. VHDL is proprietary. | |
| 59. |
For a three-input OR gate, with the input waveforms as shown below, which output waveform is correct? |
| A. | a |
| B. | b |
| C. | c |
| D. | d |
| Answer» C. c | |
| 60. |
Which timing diagram shown below is correct for an inverter? |
| A. | a |
| B. | b |
| C. | c |
| D. | d |
| Answer» C. c | |
| 61. |
Which of the figures given below represents a NOR gate? |
| A. | a |
| B. | b |
| C. | c |
| D. | d |
| Answer» E. | |
| 62. |
Which of the examples below expresses the associative law of addition: |
| A. | A + (B + C) = (A + B) + C |
| B. | A + (B + C) = A + (BC) |
| C. | A(BC) = (AB) + C |
| D. | ABC = A + B + C |
| Answer» B. A + (B + C) = A + (BC) | |
| 63. |
A LOW placed on the input of an inverter will produce a HIGH output. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 64. |
Which of the figures (a to d) is the DeMorgan equivalent of Figure (e)? |
| A. | a |
| B. | b |
| C. | c |
| D. | d |
| Answer» B. b | |
| 65. |
The format used to present the logic output for the various combinations of logic inputs to a gate is called a(n): |
| A. | truth table. |
| B. | input logic function. |
| C. | Boolean constant. |
| D. | Boolean variable. |
| Answer» B. input logic function. | |