MCQOPTIONS
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MCQOPTIONS
This section includes 15 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
For signals which are updated frequently _____ is used. |
| A. | static storage |
| B. | dynamic storage |
| C. | static and dynamic storage |
| D. | buffer |
| Answer» C. static and dynamic storage | |
| 2. |
Non inverting dynamic register storage cell consists of _________ transistors for nMOS and _________ for CMOS. |
| A. | six, eight |
| B. | eight, six |
| C. | five, six |
| D. | six, five |
| Answer» B. eight, six | |
| 3. |
Inverting dynamic register element consists of __________ transistors for nMOS and _________ for CMOS. |
| A. | two, three |
| B. | three, two |
| C. | three, four |
| D. | four, three |
| Answer» D. four, three | |
| 4. |
As the temperature is increased, storage time ____________ |
| A. | halved |
| B. | doubled |
| C. | does not change |
| D. | tripled |
| Answer» B. doubled | |
| 5. |
___________ is used to drive high capacitance load. |
| A. | single polar capability |
| B. | bipolar capability |
| C. | tripolar capability |
| D. | bi and tri polar capability |
| Answer» C. tripolar capability | |
| 6. |
FOR_SIGNALS_WHICH_ARE_UPDATED_FREQUENTLY_______IS_USED?$ |
| A. | static storage |
| B. | dymanic storage |
| C. | static and dynamic storage |
| D. | buffer |
| Answer» C. static and dynamic storage | |
| 7. |
In four bit dynamic shift register output is obtaine? |
| A. | parallel output at inverters 1,3,5,7 |
| B. | parallel output at inverters 1,5,8 |
| C. | parallel output at all inverters |
| D. | parallel output at inverter 2,4,6,8 |
| Answer» E. | |
| 8. |
In a four bit dynamic shift register basic nMOS transistor or inverters are connected in |
| A. | series |
| B. | cascade |
| C. | parallel |
| D. | series and parallel |
| Answer» C. parallel | |
| 9. |
Register cell consists of |
| A. | inverter |
| B. | pass transistor |
| C. | both of the mentioned |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 10. |
Non inverting dynamic register storage cell consists of ____ transistors for nMOS and _____ for CMOS |
| A. | six, eight |
| B. | eight, six |
| C. | five, six |
| D. | six, five |
| Answer» B. eight, six | |
| 11. |
Inverting dynamic register element consists of _____ transistors for nMOS and ____ for CMOS |
| A. | two, three |
| B. | three, two |
| C. | three, four |
| D. | four, three |
| Answer» D. four, three | |
| 12. |
As the temperature is increased, storage time ______ |
| A. | halved |
| B. | doubled |
| C. | does not change |
| D. | tripled |
| Answer» B. doubled | |
| 13. |
_____ is used to drive high capacitance load |
| A. | single polar capability |
| B. | bipolar capability |
| C. | tripolar capability |
| D. | bi and tri polar capability |
| Answer» C. tripolar capability | |
| 14. |
Which are easier to design? |
| A. | clocked circuits |
| B. | asynchronous sequential circuits |
| C. | clocked circuits with buffer |
| D. | asynchronous sequential circuits with buffers |
| Answer» B. asynchronous sequential circuits | |
| 15. |
Clocked sequential circuits are |
| A. | two phase overlapping clock |
| B. | two phase non overlapping clock |
| C. | four phase overlapping clock |
| D. | four phase non overlapping clock |
| Answer» C. four phase overlapping clock | |