MCQOPTIONS
Saved Bookmarks
MCQOPTIONS
This section includes 15 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Organization knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
IN_THE_ARM,_PC_IS_IMPLEMENTED_USING_____?$ |
| A. | Caches |
| B. | Heaps |
| C. | General purpose register |
| D. | Stack |
| Answer» D. Stack | |
| 2. |
The banked registers are used for ______$ |
| A. | Switching between supervisor and interrupt mode |
| B. | Extended storing |
| C. | Same as other general purpose registers |
| D. | None of the mentioned |
| Answer» B. Extended storing | |
| 3. |
The additional duplicate register used in ARM machines are called as _______$ |
| A. | Copied-registers |
| B. | Banked registers |
| C. | EXtra registers |
| D. | Extential registers |
| Answer» C. EXtra registers | |
| 4. |
The effective address of the instruction written in Post-indexed mode, MOVE[Rn]+Rm is _______ |
| A. | EA = [Rn]. |
| B. | EA = [Rn + Rm]. |
| C. | EA = [Rn] + Rm |
| D. | EA = [Rm] + Rn |
| Answer» B. EA = [Rn + Rm]. | |
| 5. |
The addressing mode where the EA of the operand is the contents of Rn is ______ |
| A. | Pre-indexed mode |
| B. | Pre-indexed with write back mode |
| C. | Post-indexed mode |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 6. |
All instructions in ARM are conditionally executed. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 7. |
Each instruction in ARM machines is encoded into ____ Word. |
| A. | 2 byte |
| B. | 3 byte |
| C. | 4 byte |
| D. | 8 byte |
| Answer» D. 8 byte | |
| 8. |
RISC stands for ________? |
| A. | Restricted Instruction Sequencing Computer |
| B. | Restricted Instruction Sequential Compiler |
| C. | Reduced Instruction Set Computer |
| D. | Reduced Induction Set Computer |
| Answer» D. Reduced Induction Set Computer | |
| 9. |
Memory can be accessed in ARM systems by _____ instructions. |
| A. | Store |
| B. | MOVE |
| C. | Load |
| D. | arithmetic |
| Answer» C. Load | |
| 10. |
The address system supported by ARM systems is/are ______ |
| A. | Little Endian |
| B. | Big Endian |
| C. | X-Little Endian |
| D. | Both Little & Big Endian |
| Answer» E. | |
| 11. |
The address space in ARM is ______ |
| A. | 2<sup>24</sup> |
| B. | 2<sup>64</sup> |
| C. | 2<sup>16</sup> |
| D. | 2<sup>32</sup> |
| Answer» E. | |
| 12. |
The ARM processors don’t support Byte addressability.$ |
| A. | True |
| B. | False |
| Answer» C. | |
| 13. |
ARM processors where basically designed for _______ |
| A. | Main frame systems |
| B. | Distributed systems |
| C. | Mobile systems |
| D. | Super computers |
| Answer» D. Super computers | |
| 14. |
The main importance of ARM micro-processors is providing operation with ______ |
| A. | Low cost and low power consumption |
| B. | Higher degree of multi-tasking |
| C. | Lower error or glitches |
| D. | Efficient memory management |
| Answer» B. Higher degree of multi-tasking | |
| 15. |
ARM stands for _____________ |
| A. | Advanced Rate Machines |
| B. | Advanced RISC Machines |
| C. | Artificial Running Machines |
| D. | Aviary Running Machines |
| Answer» C. Artificial Running Machines | |