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MCQOPTIONS
This section includes 2171 Mcqs, each offering curated multiple-choice questions to sharpen your ENGINEERING SERVICES EXAMINATION (ESE) knowledge and support exam preparation. Choose a topic below to get started.
| 201. |
In the 8421 BCD code, the decimal number 125, is written as |
| A. | 1111101 |
| B. | 0001 0010 0101 |
| C. | 7 D |
| D. | none of these |
| Answer» B. 0001 0010 0101 | |
| 202. |
For the given truth table, the correct Boolean expression is |
| A. | A |
| B. | B |
| C. | C |
| D. | D |
| Answer» C. C | |
| 203. |
Which of the following logic no resistors are used? |
| A. | CMOS |
| B. | TTL |
| C. | 4 n sec ECL |
| D. | 8 sec ECL |
| Answer» B. TTL | |
| 204. |
A carry look ahead adder is frequently used for addition because |
| A. | it costs less |
| B. | it is faster |
| C. | it is more accurate |
| D. | is uses fewer gates |
| Answer» C. it is more accurate | |
| 205. |
Which binary subtraction is incorrect? |
| A. | 100101 - 100011 = 000000 |
| B. | 10000000 - 01000000 = 1000000 |
| C. | 10111110.1 - 101011.11 = 110010.11 |
| D. | 11111111 - 1111111 = 10000000 |
| Answer» B. 10000000 - 01000000 = 1000000 | |
| 206. |
A (A + B) = |
| A. | A |
| B. | B |
| C. | A̅ |
| D. | B̅ |
| Answer» B. B | |
| 207. |
Find the FSV (full scale voltage) in a 6 bit R-2R ladder D/A converter has a reference voltage of 6.5 V. |
| A. | 6.4 V |
| B. | 0.1 V |
| C. | 7 V |
| D. | 8 V |
| Answer» B. 0.1 V | |
| 208. |
BCD numbers are useful whenever |
| A. | binary to hexadecimal conversion is desired |
| B. | binary to BCD conversion is desired |
| C. | decimal information is transferred into or out of a digital system |
| D. | none of the above |
| Answer» D. none of the above | |
| 209. |
The high voltage level of a digital signal in positive logic is |
| A. | 1 |
| B. | 0 |
| C. | either 1 or 0 |
| D. | -1 |
| Answer» B. 0 | |
| 210. |
AECF1₁₆ + 15ACD₁₆ = __________ . |
| A. | C47BB₁₆ |
| B. | C47BE₁₆ |
| C. | A234F₁₆ |
| D. | A1111₁₆ |
| Answer» C. A234F₁₆ | |
| 211. |
A twisted ring counter consisting of 4 FF will have |
| A. | 4 states |
| B. | 8 states |
| C. | 2⁴ states |
| D. | None of the above |
| Answer» C. 2⁴ states | |
| 212. |
In a shift left register, shifting a bit by one bit means |
| A. | division by 2 |
| B. | multiplication by 2 |
| C. | subtraction of 2 |
| D. | None of the above |
| Answer» C. subtraction of 2 | |
| 213. |
The given figure shows a K-map for a Boolean function. The number of essential prime implicants is |
| A. | 4 |
| B. | 5 |
| C. | 6 |
| D. | 8 |
| Answer» B. 5 | |
| 214. |
Assertion (A): Gate triggering is the most commonly used method for triggering of an SCR.Reason (R): Even a small gate current is sufficient to turn on an SCR. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R correct but R is not correct explanation of A |
| C. | A is correct but R is wrong |
| D. | A is wrong but R is correct |
| Answer» B. Both A and R correct but R is not correct explanation of A | |
| 215. |
The sum S of A and B in a Half Adder can be implemented by using K NAND gates. The value of K is |
| A. | 3 |
| B. | 4 |
| C. | 5 |
| D. | none of these |
| Answer» C. 5 | |
| 216. |
In 2's complement addition, the carry generated in the last stage is |
| A. | added to LSB |
| B. | neglected |
| C. | added to bit next to MSB |
| D. | added to the bit next to LSB |
| Answer» C. added to bit next to MSB | |
| 217. |
If an inverter is placed at the input to an SR flip-flop, the result is |
| A. | T flip-flop |
| B. | D flip-flop |
| C. | JK flip-flop |
| D. | BCD decade counter |
| Answer» C. JK flip-flop | |
| 218. |
The open wired circuit in the given figure works as a |
| A. | EX - NOR gate |
| B. | AND gate |
| C. | XOR gate |
| D. | NOR gate |
| Answer» D. NOR gate | |
| 219. |
Assertion (A): Demorgan's first theorem replaces a NOR gate by bubbled AND gate.Reason (R): Double complement of a variable equals the variable. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» C. A is true, R is false | |
| 220. |
Each cell of a static RAM has |
| A. | 4 MOS transistors |
| B. | 4 MOS transistors and 2 capacitors |
| C. | 2 MOS transistors and two capacitors |
| D. | 1 MOS transistor and 1 capacitor |
| Answer» B. 4 MOS transistors and 2 capacitors | |
| 221. |
In an 8085 microprocessor, the instruction CMP B has been executed while the content of the accumulator is less than that of register B, As a result. |
| A. | carry flag will be set but zero flag will be reset |
| B. | carry flag will be reset but zero flag will be set |
| C. | both carry flag and zero flag will be reset |
| D. | both carry flag and zero flag will be set |
| Answer» B. carry flag will be reset but zero flag will be set | |
| 222. |
In 8085 microprocessor, an interrupt service request is serviced |
| A. | immediately on receipt of request |
| B. | after the execution of the current instruction is completed |
| C. | at the end of the current machine cycle |
| D. | none |
| Answer» C. at the end of the current machine cycle | |
| 223. |
A 12 bit ADC is operating with 1 μs clock period. Total conversion time is 14 μs. ADC is |
| A. | flash type |
| B. | counting type |
| C. | integrating type |
| D. | successive approximation type |
| Answer» D. successive approximation type | |
| 224. |
When a binary adder is used as BCD adder, the sum is |
| A. | correct when it is < 9 |
| B. | correct when it is > 9 |
| C. | correct when it is < 16 |
| D. | none of these |
| Answer» B. correct when it is > 9 | |
| 225. |
A 4 bit DAC gives an output of 4.5 V for input of 1001. If input is 0110, the output is |
| A. | 1.5 V |
| B. | 2.0 V |
| C. | 3.0 V |
| D. | 4.5 V |
| Answer» D. 4.5 V | |
| 226. |
In INHIBIT operation |
| A. | output is 1 when both inputs are 0 |
| B. | output is 0 when blocking input is 1 |
| C. | output is 0 when blocking input is 0 |
| D. | output is 1 when blocking input is either 0 or 1 |
| Answer» C. output is 0 when blocking input is 0 | |
| 227. |
The process of entering data into ROM is called |
| A. | writing |
| B. | burning |
| C. | decoding |
| D. | registering |
| Answer» C. decoding | |
| 228. |
The PC contains 0450 H and SP contains 08D 6 H. What will be content of P and SP following a CALL to subroutine at location 02 AFH? |
| A. | 0453 H, 08 D 8 H |
| B. | 0453 H, 08 D 4 H |
| C. | 02 AFH, 08 D 8 H |
| D. | 02 AFH, 08 D 4 H |
| Answer» E. | |
| 229. |
The Boolean expression Y = (A + B̅ + A̅B) C̅ then Y will be equal to |
| A. | AC̅ |
| B. | BC̅ |
| C. | C̅ |
| D. | none |
| Answer» D. none | |
| 230. |
The Boolean function A + BC is reduced form of |
| A. | AB + BC |
| B. | A̅B + A̅BC |
| C. | (A + B) (A + C) |
| D. | (A + C)B |
| Answer» D. (A + C)B | |
| 231. |
A clock signal coordinates the working of different flip flops. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» B. False | |
| 232. |
In LIFO |
| A. | only the top of the stack is immediately accessible |
| B. | only the top of the stack is never accessible |
| C. | only the first-in is accessible |
| D. | only the first-in is not accessible |
| Answer» B. only the top of the stack is never accessible | |
| 233. |
Consider the following digital circuits: 1. Multipliers2. Read only memories3. D-latch4. Circuits as shown in figureWhich of these come under the class of combinational circuit? |
| A. | 1 and 2 |
| B. | 3 and 4 |
| C. | 1, 2 and 3 |
| D. | 1, 2, 3 and 4 |
| Answer» B. 3 and 4 | |
| 234. |
Decimal number 9 in gray code = |
| A. | 1100 |
| B. | 1101 |
| C. | 110 |
| D. | 1111 |
| Answer» C. 110 | |
| 235. |
A 6 MHz channel is used by a digital signalling system initializing four-level signals. The maximum possible transmission rate is |
| A. | 6M bands/s |
| B. | 12M bands/s |
| C. | 6 M bits/s |
| D. | 12M bits/s |
| Answer» B. 12M bands/s | |
| 236. |
The product of which of the following gives the figure of merit of a logic family? |
| A. | Gain and bandwidth |
| B. | Propagation delay time and power dissipation |
| C. | Fan-out and propagation delay time |
| D. | Noise margin and power dissipation |
| Answer» C. Fan-out and propagation delay time | |
| 237. |
A presettable counter with 4 flip flops can start counting from |
| A. | 0000 |
| B. | 1000 |
| C. | any number from 0000 to 1000 |
| D. | any number from 0000 to 1111 |
| Answer» E. | |
| 238. |
The decimal equivalent of the hexadecimal number (3 E 8)₁₆ is |
| A. | 1000 |
| B. | 982 |
| C. | 768 |
| D. | 323 |
| Answer» B. 982 | |
| 239. |
Which multivibrator can be used as a clock timer? |
| A. | Astable multivibrator |
| B. | Bistable multivibrator |
| C. | Any of the above |
| D. | None of the above |
| Answer» B. Bistable multivibrator | |
| 240. |
Two 16 : 1 and one 2 : 1 multiplexers can be connected to form a |
| A. | 16 : 1 multiplexer |
| B. | 32 : 1 multiplexer |
| C. | 64 : 1 multiplexer |
| D. | 8 : 1 multiplexer |
| Answer» C. 64 : 1 multiplexer | |
| 241. |
Which of the following logic family is fastest of all? |
| A. | TTL |
| B. | RTL |
| C. | DCTL |
| D. | ECL |
| Answer» E. | |
| 242. |
Programmable logic array uses |
| A. | RAM matrices |
| B. | ROMs matrices |
| C. | PROM matrices |
| D. | Silo memory |
| Answer» C. PROM matrices | |
| 243. |
Out of multiplexer and demultiplexer, which can be used as a logic function generator? |
| A. | Multiplexer only |
| B. | Demultiplexer only |
| C. | Both |
| D. | None |
| Answer» B. Demultiplexer only | |
| 244. |
State transition table and state transition diagram form part of design steps for |
| A. | combinational circuits |
| B. | sequential circuits |
| C. | delay circuits |
| D. | all of the above |
| Answer» C. delay circuits | |
| 245. |
For the K map in the given figure, the simplified expression is |
| A. | A |
| B. | B |
| C. | C |
| D. | D |
| Answer» C. C | |
| 246. |
The most commonly used logic family is |
| A. | ECL |
| B. | TTL |
| C. | CMOS |
| D. | PMOS |
| Answer» C. CMOS | |
| 247. |
Assuming accumulator contain A 64 and the carry is set (1). What will register A and (CY) contain after ADI A4H? |
| A. | 4 AH, 0 |
| B. | 4 AH, 1 |
| C. | 4 BH, 0 |
| D. | 4 BH, 1 |
| Answer» C. 4 BH, 0 | |
| 248. |
Logic hardware is available only in NAND and NOR. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» C. May be True or False | |
| 249. |
Flow charts that contain decision symbol |
| A. | represent straight line programs |
| B. | do not represent straight line programs |
| C. | all of the above |
| D. | none of the above |
| Answer» C. all of the above | |
| 250. |
The output of the circuit shown below will be of the frequency |
| A. | 125 Hz |
| B. | 250 Hz |
| C. | 500 Hz |
| D. | 750 Hz |
| Answer» C. 500 Hz | |