Explore topic-wise MCQs in Linear Integrated Circuit.

This section includes 5 Mcqs, each offering curated multiple-choice questions to sharpen your Linear Integrated Circuit knowledge and support exam preparation. Choose a topic below to get started.

1.

Choose the appropriate value of diode to get a speedy diode from the given values of storage time (n) in sec and forward voltage (V ).

A. n = 56 , V<sub> </sub> = 0.96
B. n = 100 , V<sub> </sub> = 0.92
C. n = 9 , V<sub> </sub> = 0.85
D. n = 53 , V<sub> </sub> = 0.95
Answer» D. n = 53 , V<sub> </sub> = 0.95
Discussion
2.

The advantage of Multi-emitter transistor is

A. To reduce fabrication steps
B. To save chip area
C. To lower design consideration
D. To provide linear output
Answer» C. To lower design consideration
Discussion
3.

The diffusion of collector impurities in npn transistor should be small because,

A. No additional diffusion or masking steps required
B. Bandwidth is controlled by lateral diffusion of p-type impurity
C. Collector need not be kept at negative potential
D. None of the mentioned
Answer» E.
Discussion
4.

State the correct reason for neglecting pnp transistor.

A. Increase in the series collector resistance of pnp transistor
B. Parasitic capacitance appears between collector and substrate
C. Current gain of pnp transistor is as low as 1.5 to 30
D. None of the mentioned
Answer» D. None of the mentioned
Discussion
5.

The buried layer reduces collector series resistance by providing,

A. A low resistivity current path from n-type layer to n<sup>+</sup> contact layer
B. A low resistivity current path from p-type layer to n<sup>+</sup> contact layer
C. A high resistivity current path from n-type layer to n<sup>+</sup> contact layer
D. A high resistivity current path from p-type layer to n<sup>+</sup> contact layer
Answer» B. A low resistivity current path from p-type layer to n<sup>+</sup> contact layer
Discussion