MCQOPTIONS
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MCQOPTIONS
This section includes 164 Mcqs, each offering curated multiple-choice questions to sharpen your Bachelor of Sc in Computer Science FY knowledge and support exam preparation. Choose a topic below to get started.
| 101. |
In 8086, Example for Non maskable interrupts are . |
| A. | trap |
| B. | rst6.5 |
| C. | intr |
| D. | rst6.6 |
| Answer» B. rst6.5 | |
| 102. |
8086 and 8088 contains transistors |
| A. | 29000 |
| B. | 24000 |
| C. | 34000 |
| D. | 54000 |
| Answer» B. 24000 | |
| 103. |
CS connect the output of |
| A. | encoder |
| B. | decoder |
| C. | slave program |
| D. | buffer |
| Answer» C. slave program | |
| 104. |
The pin is used to select direct command word |
| A. | a0 |
| B. | d7-d6 |
| C. | a12 |
| D. | ad7-ad6 |
| Answer» B. d7-d6 | |
| 105. |
Bits in IRR interrupt are |
| A. | reset |
| B. | set |
| C. | stop |
| D. | start |
| Answer» C. stop | |
| 106. |
signal prevent the microprocessor from reading the same data more than one |
| A. | pipelining |
| B. | handshaking |
| C. | controlling |
| D. | signaling |
| Answer» C. controlling | |
| 107. |
The primary function of the is to accept data from I/P devices |
| A. | multiprocessor |
| B. | microprocessor |
| C. | peripherals |
| D. | interfaces |
| Answer» C. peripherals | |
| 108. |
An is used to fetch one address |
| A. | internal decoder |
| B. | external decoder |
| C. | encoder |
| D. | register |
| Answer» B. external decoder | |
| 109. |
has certain signal requirements write into and read from its registers |
| A. | memory |
| B. | register |
| C. | both (a) and (b) |
| D. | control |
| Answer» B. register | |
| 110. |
signal is generated by combining RD and WR signals with IO/M |
| A. | control |
| B. | memory |
| C. | register |
| D. | system |
| Answer» B. memory | |
| 111. |
The remaining address line of bus is decoded to generate chip select signal |
| A. | data |
| B. | address |
| C. | control bus |
| D. | both (a) and (b) |
| Answer» C. control bus | |
| 112. |
To interface memory with the microprocessor, connect register the lines of the address bus must be added to address lines of the chip. |
| A. | single |
| B. | memory |
| C. | multiple |
| D. | triple |
| Answer» C. multiple | |
| 113. |
Microprocessor provides signal like to indicate the read operatio |
| A. | low |
| B. | mcmw |
| C. | mcmr |
| D. | mcmwr |
| Answer» D. mcmwr | |
| 114. |
The Microprocessor places 16 bit address on the add lines from that address by register should be selected |
| A. | address |
| B. | one |
| C. | two |
| D. | three |
| Answer» C. two | |
| 115. |
The of the memory chip will identify and select the register for the EPROM |
| A. | internal decoder |
| B. | external decoder |
| C. | address decoder |
| D. | data decoder |
| Answer» B. external decoder | |
| 116. |
The Microprocessor places address on the address bus |
| A. | 4 bit |
| B. | 8 bit |
| C. | 16 bit |
| D. | 32 bit |
| Answer» D. 32 bit | |
| 117. |
To perform any operations, the Mp should identify the |
| A. | register |
| B. | memory |
| C. | interface |
| D. | system |
| Answer» B. memory | |
| 118. |
Primary function of memory interfacing is that the should be able to read from and write into register |
| A. | multiprocessor |
| B. | microprocessor |
| C. | dual processor |
| D. | coprocessor |
| Answer» C. dual processor | |
| 119. |
A Instruction at the end of interrupt service program takes the execution back to the interrupted program |
| A. | forward |
| B. | return |
| C. | data |
| D. | line |
| Answer» C. data | |
| 120. |
The bus controller device decodes the signals to produce the control bus signal |
| A. | internal |
| B. | data |
| C. | external |
| D. | address |
| Answer» D. address | |
| 121. |
If MN/MX is low the 8086 operates in mode |
| A. | minimum |
| B. | maximum |
| C. | both (a) and (b) |
| D. | medium |
| Answer» C. both (a) and (b) | |
| 122. |
In a minimum mode there is a on the system bus |
| A. | single |
| B. | double |
| C. | multiple |
| D. | triple |
| Answer» B. double | |
| 123. |
In max mode, control bus signal So,S1 and S2 are sent out in form |
| A. | decoded |
| B. | encoded |
| C. | shared |
| D. | unshared |
| Answer» C. shared | |
| 124. |
The RD, WR, M/IO is the heart of control for a mode |
| A. | minimum |
| B. | maximum |
| C. | compatibility mode |
| D. | control mode |
| Answer» B. maximum | |
| 125. |
is used to write into memory |
| A. | rd |
| B. | wr |
| C. | rd / wr |
| D. | clk |
| Answer» C. rd / wr | |
| 126. |
The is required to synchronize the internal operands in the processor CLK Signal |
| A. | ur signal |
| B. | vcc |
| C. | aie |
| D. | ground |
| Answer» B. vcc | |
| 127. |
The BIU contains FIFO register of size 6 bytes called . |
| A. | queue |
| B. | stack |
| C. | segment |
| D. | register |
| Answer» B. stack | |
| 128. |
The pin of minimum mode AD0- AD15 has _ data bus |
| A. | 4 bit |
| B. | 20 bit |
| C. | 16 bit |
| D. | 32 bit |
| Answer» D. 32 bit | |
| 129. |
The pin of minimum mode AD0-AD15 has address |
| A. | 16 bit |
| B. | 20 bit |
| C. | 32 bit |
| D. | 4 bit |
| Answer» C. 32 bit | |
| 130. |
The contains an offset instead of actual address |
| A. | sp |
| B. | ip |
| C. | es |
| D. | ss |
| Answer» C. es | |
| 131. |
The 8086 fetches instruction one after another from of memory |
| A. | code segment |
| B. | ip |
| C. | es |
| D. | ss |
| Answer» B. ip | |
| 132. |
The translates a byte from one code to another code |
| A. | xlat |
| B. | xchng |
| C. | pop |
| D. | push |
| Answer» B. xchng | |
| 133. |
The LES copies to words from memory to register and |
| A. | ds |
| B. | cs |
| C. | es |
| D. | ds |
| Answer» D. ds | |
| 134. |
The microprocessor determines whether the specified condition exists or not by testing the |
| A. | carry flag |
| B. | conditional flag |
| C. | common flag |
| D. | sign flag |
| Answer» C. common flag | |
| 135. |
The conditional branch instruction specify for branching |
| A. | conditions |
| B. | instruction |
| C. | address |
| D. | memory |
| Answer» B. instruction | |
| 136. |
Instruction providing both segment base and offset address are called |
| A. | below type . |
| B. | far type |
| C. | low type |
| D. | high type |
| Answer» C. low type | |
| 137. |
destination inverts each bit of destination |
| A. | not |
| B. | nor |
| C. | and |
| D. | or |
| Answer» B. nor | |
| 138. |
LDs copies to consecutive words from memory to register and |
| A. | es |
| B. | ds |
| C. | ss |
| D. | cs |
| Answer» C. ss | |
| 139. |
IMUL source is a signed |
| A. | multiplication |
| B. | addition |
| C. | subtraction |
| D. | division |
| Answer» B. addition | |
| 140. |
The IP is bits in length |
| A. | 8 bits |
| B. | 4 bits |
| C. | 16 bits |
| D. | 32 bits |
| Answer» D. 32 bits | |
| 141. |
The push source copies a word from source to |
| A. | stack |
| B. | memory |
| C. | register |
| D. | destination |
| Answer» B. memory | |
| 142. |
The CS register stores instruction in code segment |
| A. | stream |
| B. | path |
| C. | codes |
| D. | stream line |
| Answer» D. stream line | |
| 143. |
The BIU prefetches the instruction from memory and store them in |
| A. | queue |
| B. | register |
| C. | memory |
| D. | stack |
| Answer» B. register | |
| 144. |
The DS is called as |
| A. | data segment |
| B. | digital segment |
| C. | divide segment |
| D. | decode segment |
| Answer» B. digital segment | |
| 145. |
The 1 MB byte of memory can be divided into segment |
| A. | 1 kbyte |
| B. | 64 kbyte |
| C. | 33 kbyte |
| D. | 34 kbyte |
| Answer» C. 33 kbyte | |
| 146. |
The BIU contains FIFO register of size bytes |
| A. | 8 |
| B. | 6 |
| C. | 4 |
| D. | 12 |
| Answer» C. 4 | |
| 147. |
The index register are used to hold |
| A. | memory register |
| B. | offset address |
| C. | segment memory |
| D. | offset memory |
| Answer» B. offset address | |
| 148. |
The SS is called as |
| A. | single stack |
| B. | stack segment |
| C. | sequence stack . |
| D. | random stack |
| Answer» C. sequence stack . | |
| 149. |
The BP is indicated by |
| A. | base pointer |
| B. | binary pointer |
| C. | bit pointer |
| D. | digital pointer |
| Answer» B. binary pointer | |
| 150. |
The SP is indicated by |
| A. | single pointer |
| B. | stack pointer |
| C. | source pointer |
| D. | destination pointer |
| Answer» C. source pointer | |