MCQOPTIONS
Saved Bookmarks
| 1. |
The correct sequence of TTL logic chip in decreasing order of their gate delay time is:(a) 74 L 00(b) 74 S 00(c) 74 LS 00(d) 74 H 00Code: |
| A. | (a), (b), (c), (d) |
| B. | (a), (c), (d), (b) |
| C. | (a), (c), (b), (d) |
| D. | (b), (a), (d), (c) |
| Answer» C. (a), (c), (b), (d) | |