Statement (I): Digital ramp converter is the slowest ADC.Statement (II)): It requires N2 clock pulses for conversion.Codes:

Statement (I) is false but Statement (II) is true.

Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I).

Both Statement (I) and Statement (II) are individually true and Statement (II) is not the correct explanation of Statement (I).

Statement (I) is true but Statement (II) is false.

Statement (I): Digital ramp converter is the slowest ADC.Statement (II

1.	Statement (I): Digital ramp converter is the slowest ADC.Statement (II)): It requires N2 clock pulses for conversion.Codes:
A.	Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I).
B.	Both Statement (I) and Statement (II) are individually true and Statement (II) is not the correct explanation of Statement (I).
C.	Statement (I) is true but Statement (II) is false.
D.	Statement (I) is false but Statement (II) is true.
Answer» D. Statement (I) is false but Statement (II) is true.