For the circuit shown in the following figure I0-I3 are inputs to the – McqOptions

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1.	For the circuit shown in the following figure I0-I3 are inputs to the 4:1 multiplexer R(MSB) and S are control bitsThe output Z can be represented by
A.	PQ + PQ S + Q R S
B.	P Q + PQ R + P Q S
C.	P Q R + P QR + PQRS + Q R S
D.	PQ R + PQR S + P Q R S + Q R S
Answer» C. P Q R + P QR + PQRS + Q R S

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