figure shows three pulse train inputs to a 3-input OR gate. Assuming positive logic, the output pulse rate train in figure (b) would be

figure shows three pulse train inputs to a 3-input OR gate. Assuming p

1.	figure shows three pulse train inputs to a 3-input OR gate. Assuming positive logic, the output pulse rate train in figure (b) would be
A.	<img src="/_files/images/electronics-and-communication-engineering/digital-electronics/57-975-1.png">
B.	<img src="/_files/images/electronics-and-communication-engineering/digital-electronics/57-975-2.png">
C.	<img src="/_files/images/electronics-and-communication-engineering/digital-electronics/57-975-3.png">
D.	<img src="/_files/images/electronics-and-communication-engineering/digital-electronics/58-975-4.png">
Answer» D. <img src="/_files/images/electronics-and-communication-engineering/digital-electronics/58-975-4.png">