A pulse train can be delayed by a finite number of clock periods using – McqOptions

MCQOPTIONS

1.	A pulse train can be delayed by a finite number of clock periods using
A.	a serial-in serial-out shift register
B.	a serial-in parallel -out shift register
C.	a parallel-in serial-out shift register
D.	a parallel-in parallel -out shift register
Answer» E.

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